74HCT109D,652 查看數據表（PDF） - NXP Semiconductors.
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74HCT109D,652 Datasheet PDF : 19 Pages
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Nexperia
74HC109; 74HCT109
Dual JK flip-flop with set and reset; positive-edge-trigger
9,
QHJDWLYH
SXOVH
*1'
9,
SRVLWLYH
SXOVH
*1'
90
WI
WU
90
9,
*
57
W:
W:
9&&
'87
90
WU
WI
90
92
&/
DDK
Fig 8.
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
Test circuit for measuring switching times
Table 9. Test data
Type
Input
VI
tr, tf
74HC109
VCC
6 ns
74HCT109
3V
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
Test
tPLH, tPHL
tPLH, tPHL
74HC_HCT109
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 1 August 2016
© Nexperia B.V. 2017. All rights reserved
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