AT91SAM9G25-CU 查看數據表（PDF） - Atmel Corporation

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AT91SAM9G25-CU

Atmel | SMART ARM-based Embedded Microprocessor

Atmel Corporation 

4.3.1

Reset State

In the tables that follow, the column “Reset State” indicates the reset state of the line with mnemonics.

 “PIO” “/” signal

Indicates whether the PIO Line resets in I/O mode or in peripheral mode. If “PIO” is mentioned, the PIO Line is

maintained in a static state as soon as the reset is released. As a result, the bit corresponding to the PIO Line in the

register PIO_PSR (Peripheral Status Register) resets low.

If a signal name is mentioned in the “Reset State” column, the PIO Line is assigned to this function and the

corresponding bit in PIO_PSR resets high. This is the case of pins controlling memories, in particular the address lines,

which require the pin to be driven as soon as the reset is released.

 “I”/“O”

Indicates whether the signal is input or output state.

 “PU”/“PD”

Indicates whether Pull-Up, Pull-Down or nothing is enabled.

 “ST”

Indicates if Schmitt Trigger is enabled.

Note:

Example: The PB18 “Reset State” column shows “PIO, I, PU, ST”. That means the line PIO18 is configured as

an Input with Pull-Up and Schmitt Trigger enabled. PD14 reset state is “PIO, I, PU”. That means PIO Input with

Pull-Up. PD15 reset state is “A20, O, PD” which means output address line 20 with Pull-Down.

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SAM9G25 [DATASHEET]

Atmel-11032E-ATARM-SAMG25-Datasheet_13-Oct-14

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