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STM8S10XS4T6 查看數據表(PDF) - STMicroelectronics

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STM8S10XS4T6 Datasheet PDF : 121 Pages
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STM8S105x4/6
Product overview
4.12
TIM4 - 8-bit basic timer
8-bit auto reload, adjustable prescaler ratio to any power of 2 from 1 to 128
Clock source: CPU clock
Interrupt source: 1 x overflow/update
Timer
TIM1
TIM2
TIM3
TIM4
Table 3. TIM timer features
Counter
size (bits)
Prescaler
Counting CAPCOM Complementary
mode channels
outputs
Any integer
16
from 1 to Up/down
4
3
65536
Any power
16
of 2 from 1
Up
3
0
to 32768
Any power
16
of 2 from 1
Up
2
0
to 32768
Any power
8
of 2 from 1
Up
0
0
to 128
Ext.
trigger
Yes
No
No
No
Timer
synchronization/
chaining
No
4.13
Note:
Analog-to-digital converter (ADC1)
The STM8S105x4/6 products contain a 10-bit successive approximation A/D converter
(ADC1) with up to 10 multiplexed input channels and the following main features:
Input voltage range: 0 to VDD
Conversion time: 14 clock cycles
Single and continuous and buffered continuous conversion modes
Buffer size (n x 10 bits) where n = number of input channels
Scan mode for single and continuous conversion of a sequence of channels
Analog watchdog capability with programmable upper and lower thresholds
Analog watchdog interrupt
External trigger input
Trigger from TIM1 TRGO
End of conversion (EOC) interrupt
Additional AIN12 analog input is not selectable in ADC scan mode or with analog watchdog.
Values converted from AIN12 are stored only into the ADC_DRH/ADC_DRL registers.
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