Micrel, Inc.
KSZ9021RL/RN
RGMII Signal Definition
The following table describes the RGMII signals. Refer to the RGMII Version 1.3 Specification for more detailed
information.
RGMII
Signal Name
(per spec)
TXC
RGMII
Signal Name
(per KSZ9021RL/RN)
GTX_CLK
TX_CTL
TXD[3:0]
RXC
TX_EN
TXD[3:0]
RX_CLK
RX_CTL
RXD[3:0]
RX_DV
RXD[3:0]
Pin Type
(with respect
to PHY)
Input
Input
Input
Output
Output
Output
Pin Type
(with respect
to MAC)
Output
Output
Output
Input
Input
Input
Description
Transmit Reference Clock
(125MHz for 1000Mbps, 25MHz for
100Mbps, 2.5MHz for 10Mbps)
Transmit Control
Transmit Data [3:0]
Receive Reference Clock
(125MHz for 1000Mbps, 25MHz for
100Mbps, 2.5MHz for 10Mbps)
Receive Control
Receive Data [3:0]
Table 3. RGMII Signal Definition
RGMII Signal Diagram
The KSZ9021RL/RN RGMII pin connections to the MAC are shown in the following figure.
KSZ9021RL/RN
GTX_CLK
TX_EN
TXD[3:0]
RGMII
Ethernet MAC
TXC
TX_CTL
TXD[3:0]
RX_CLK
RX_DV
RXD[3:0]
RXC
RX_CTL
RXD[3:0]
February 13, 2014
Figure 4. KSZ9021RL/RN RGMII Interface
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Revision 1.2