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LV52205MU 查看數據表(PDF) - ON Semiconductor

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LV52205MU
ON-Semiconductor
ON Semiconductor ON-Semiconductor
LV52205MU Datasheet PDF : 12 Pages
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PWM Control
Ton>20us
PWM
Shutdown
DC-DC Delay
max = 4.6ms
DCDCENH
(IC inside signal)
FB
LV52205MU
Toff > 8.9ms
PWM Enable
Max 4ms @ Cfcap = 22nF
(T.C.= 60k * Cfcap)
FCAP
The time until stable movement max = 8.6ms
Fig2.Timing Diagram in PWM signal
Open LED Protection
If SW terminal voltage exceeds a threshold Vovp (41V typ) for 8 cycles, boost converter enters shutdown mode. In
order to restart the IC, PWM setup signal is required again.
Over Current Protection
Current limit value for built-in power MOS is around 0.7A. The power MOS is turned off for each switching cycle when
peak current through it exceeds the limit value.
Under Voltage Lock Out (UVLO)
UVLO operation works when VIN terminal voltage is below 2.2V.
Thermal Shutdown
When chip temperature is too high, boost converter is stopped.
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