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MAX1202ACAP 查看數據表(PDF) - Maxim Integrated

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MAX1202ACAP Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MAX1202/MAX1203
5V, 8-Channel, Serial, 12-Bit ADCs
with 3V Digital Interface
Electrical Characteristics (continued)
(VDD = +5V ±5%, VL = 2.7V to 3.6V; VSS = 0V or -5V ±5%; fSCLK = 2.0MHz, external clock (50% duty cycle); 15 clocks/conversion
cycle (133ksps); MAX1202—4.7μF capacitor at REF pin; MAX1203—external reference, VREF = 4.096V applied to REF pin; TA = TMIN
to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
CONVERSION RATE
Conversion Time (Note 5)
Internal clock
tCONV External clock, 2MHz, 12 clocks/conversion
Track/Hold Acquisition Time
Aperture Delay
tACQ
Aperture Jitter
Internal Clock Frequency
External compensation mode, 4.7µF
External Clock Frequency Range
Internal compensation mode (Note 6)
Used for data transfer only
ANALOG INPUT
Input Voltage Range, Single-Ended
and Differential (Note 7)
Multiplexer Leakage Current
Input Capacitance
Unipolar, VSS = 0V
Bipolar, VSS = -5V
On/off-leakage current, VCH_ = ±5V
(Note 6)
INTERNAL REFERENCE (MAX1202 only, reference-buffer enabled)
REF Output Voltage
REF Short-Circuit Current
TA = +25°C
MAX1202AC
VREF Temperature Coefficien
MAX1202AE
MAX1202B
Load Regulation (Note 8)
0 to 0.5mA output load
Capacitive Bypass at REF
Internal compensation mode
External compensation mode
Capacitive Bypass at REFADJ
REFADJ Adjustment Range
EXTERNAL REFERENCE AT REF (Reference buffer disabled, VREF = 4.096V)
Input Voltage Range
MIN TYP MAX UNITS
5.5
10
6
1.5
10
< 50
1.7
0.1
2.0
0.1
0.4
0
2.0
µs
µs
ns
ps
MHz
MHz
VREF
V
±VREF/2
±0.01 ±1
µA
16
pF
4.076 4.096 4.116 V
30
mA
±30 ±50
±30 ±60 ppm/°C
±30
2.5
mV
0
µF
4.7
0.01
µF
±1.5
%
2.50
VDD +
50mV
V
Input Current
Input Resistance
200 350
µA
12 20
kΩ
REF Input Current in Shutdown
REFADJ Buffer Disable Threshold
VSHDN = 0V
1.5 10
µA
VDD -
50mV
V
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