MAX3395E 查看數據表（PDF） - Maxim Integrated

零件编号

产品描述 (功能)

生产厂家

MAX3395E

±15kV ESD-Protected, High-Drive Current, Dual-/Quad-/Octal-Level Translators with Speed-Up Circuitry

Maxim Integrated 

±15kV ESD-Protected, High-Drive Current, Dual-/Quad-/

Octal-Level Translators with Speed-Up Circuitry

VL

VCC

VL EN

VCC

MAX3394E

MAX3395E

VL MAX3396E

VCC

I/O VL_

CIOVL

I/O VCC_

50Ω

Figure 3. Push-Pull Driving I/O VCC_ Test Circuit and Timing

VL

VCC

VL EN

VCC

MAX3394E

MAX3395E

VL MAX3396E

VCC

I/O VL_

CIOVL

I/O VCC_

VGATE

tRVL

tFVL

I/O VCC

50%

90%

50% 90%

50%

50%

10%

tI/OVCC-VL

tI/OVCC-VL

10%

I/O VL

tRVL

tFVL

I/O VL

90%

90%

50%

50%

50%

50%

10%

10%

tI/OVCC-VL

tI/OVCC-VL

Figure 4. Open-Drain Driving I/O VCC_ Test Circuit and Timing

capacitive isolation between I/O lines. When one or

both I/O lines are at a logic-low level, the gate-control

logic turns the pass-FET on. When the pass-FET is

active, I/O VL_ and I/O VCC_ are connected, allowing

the logic-low signal to be expressed simultaneously on

both I/O lines.

The MAX3394E/MAX3395E/MAX3396E have internal

10kΩ (typ) pullup resistors from I/O VL_ and I/O VCC_

to the respective supply voltages, allowing operation

with open-drain drivers. Internal slew-rate enhancement

circuitry accelerates logic-state transitions, maintaining

a fast data rate with a higher bus load capacitance.

Additionally, the 10mA current sink drivers permit the

use of smaller external pullup resistors.

Internal Slew-Rate Enhancement

Internal slew-rate enhancement circuitry accelerates

logic-state changes by turning on MOSFETs MP1 and

MP2 during low-to-high logic transitions, and MOSFETs

MN3 and MN4 during high-to-low logic transitions (see

the Functional Diagram). During logic-state changes,

speed-up MOSFETS are triggered by I/O line voltage

thresholds. MOSFETS MN3 and MN4 sink 10mA during

high-to-low logic transitions. MP1 and MP2 source 15mA

during low-to-high logic transitions. Slew-rate enhance-

ment allows a fast data rate despite large capacitive bus

loads, and permits larger external pullup resistors.

_______________________________________________________________________________________ 9

Share Link: