LR24C256D 查看數據表（PDF） - Leshan Radio Company,Ltd

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LR24C256D

128K bits (16,384 X 8) / 256K bits (32,768 X 8) Two-wire Serial EEPROM

Leshan Radio Company,Ltd 

LESHAN RADIO COMPANY, LTD.

Bus Timing

Figure 10. SCL: Serial Clock, SDA: Serial Data I/O

Write Cycle Timing

Figure 11. SCL: Serial Clock, SDA: Serial Data I/O

Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the

end of the internal clear/write cycle.

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