MC146818AS 查看數據表（PDF） - Motorola => Freescale

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MC146818AS

REAL-TIME CLOCK PLUS RAM

Motorola => Freescale 

POWER-DOWN CONSIDERATIONS

In most systems, the MC146818A must continue to keep

Before initializing the internal registers, the SET bit in

time when system power is removed. In such systems, a

Register B should be set to a “1” to prevent time/calendar

conversion from system power to an alternate power supply,

updates from occurring. The program initializes the 10 loca-

usually a battery, must be made. During the transition from

tions in the selected format (binary or BCD), then indicates

system to battery power, the designer of a battery backed-up

the format in the data mode (DM) bit of Register B. All

RTC system must protect data integrity, minimize power

10 time, calendar, and alarm bytes must use the same data

consumption, and ensure hardware reliability.

mode, either binary or BCD. The SET bit may now be c~red

The stand-by (STBY) pin controls all bus inputs (R/~,

to allow updates. Once initialized the real-time clocR’Mkes

DS, AS, ADO-AD7) ST BY, when negated, disallows any

all updates in the selected data mode. The data ~~~a,~%nnot

unintended modification of the RTC data by the bus. STBY

be changed without reinitializing the 10 data ,&~<~~~$t*

also reduces power consumption by reducing the number of

Table 3 shows the binary and BCD form~&Q{t~e

10 time,

transitions seen internally.

calendar, and alarm locations. The 24/:~9 ‘~~~,1~ Register B

Power consumption may be further reduced by removing

establishes whether the hour locatio+n$f#p[&sent l-to-12 or

resistive and capacitive loads from the clock out (CKOUT)

O-to-23. The 24/12 bit cannot be c~;fi~&~”r%ithout reinitializ-

pin and the squarewave (SQW) pin.

ing the hour locations. When th+ l~~~~r format is selected

During and after the power source conversion, the VIN

maximum specification must never be exceeded. Failure to

meet the VIN maximum specification can cause a virtual

the high-order

a “l”.

bit of the hou.;r..s:hi.\.\~‘<yJ&,+~:.),\,.+\..*l,,>. .r<e.p, resents

PM when it is

The time, calendar, ~@ ~~~rm bytes are not always

SCR to appear which may result in excessive current drain

and destruction of the part.

accessible by the proc,.e::~,\?.,i:.,.@.., ;ogram.

Once per second the

10 bytes are switched ~,~b update logic to be advanced by

ADDRESS MAP

one second and te<~ec~for an alarm condition. If any of the

10 bytes are,~&#@$?This time, the data outputs are unde-

Figure 14 shows the address map of the MC146818A, The

fined. The u~~a~ ~~ckout time is 248ys at the 4.19W04 MHz

memory consists of 50 general purpose RAM bytes, 10 RAM

and 1.O@fiMMz

time bases and 1948 ps for the 32.768 kHz

bytes which normally contain the time, calendar, and alarm

time Qas&fl~he Update Cycle section shows how to accom-

data, and four control and status bytes, All 64 bytes are

mo,&e the update cycle in the processor program.

directly readable and writable by the processor program ex-

,,$~t~~e%~hree alarm bytes may be used in two ways. First,

cept for the following: 1) Registers C and D are read only,

2) bit 7 of Register A is read only, and 3) the high-order bit of

,%,~p~$ the Program inserts an alarm time in the appropriate

,~$~$~pbrs, minutes, and seconds alarm locations, the alarm in-

the seconds byte is read only. The contents of four control

“:,$~”fbrrupt is initiated at the specified time each day if the alarm

and status registers (A,

REGISTERS.

TIME, CALENDAR, AND

B, C,

ALARM

and D) are

LOCATIONS

described

in

,~.,F...,i..,’.’

*J~”

~’ ~.::,$..,

‘%<. ‘,+

>.....!.l’’t;):\!..,.,).t..,..$.<l>\b

enable bit is high. The second usage is to insert a “don’t

care” state in one or more of three alarm bytes. The “don’t

care” code is any hexadecimal byte from CO to FF. That is,

the two most-significant bits of each byte, when set to “l”,

The processor program obtains time and calw~~~r ~tiYor-

create a “don’t care” situation. An alarm interrupt each hour

mation by reading the appropriate locations. ~~f~~gram

>.’*. J.

may initialize the time, calendar, and ala~,$~p$i~rltlng

to

is created with a “don’t care” code in the hours alarm loca-

tion. Similarly, an alarm is generated every minute with

these RAM locations. The contents of th.$,~@&~”~, calendar,

‘~

and alarm bytes may be either bi.~r~.,~~ binarv-coded

“don’t care” codes in the hours and minutes alarm bytes.

The “don’t care” codes in all three alarm bytes create an in-

decimal (BCD).

terrupt every second.

—

o

13

FIGURE 14 – ADDRESS MAP

00

01

Seconds

1I

Seconds Alarm

OD

100)

01 I

50

Bvtes

User

RAM

1

I

Binary

or BCC

Contents

4

I

\

10 I

Register A

I OA

63

(M) MOTOROLA

Semiconductor Products Inc.

11

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