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CP2114 查看數據表(PDF) - Silicon Laboratories

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CP2114 Datasheet PDF : 44 Pages
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CP2114
Table 2. I2S, I2C, UART and Suspend I/O DC Electrical Characteristics
VDD = 3.0 to 3.6 V, VIO = 1.8 V to VDD, –40 to +85 °C unless otherwise specified.
Parameters
Test Condition
Min
Typ
Output High Voltage (VOH)
Output Low Voltage (VOL)
Input High Voltage (VIH)
Input Low Voltage (VIL)
Input Leakage Current
Maximum Input Voltage
IOH = –10 µA
IOH = –3 mA
IOH = –10 mA
IOL = 10 µA
IOL = 8.5 mA
IOL = 25 mA
Weak Pull-Up Off
Weak Pull-Up On, VIO = 0 V
Open drain, logic high (1)
VIO – 0.1
VIO – 0.2
0.7 x VIO
VIO – 0.4
0.6
25
Max
0.1
0.4
0.6
1
50
5.8
Unit
V
V
V
V
µA
V
Table 3. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Parameter
RST Input High Voltage
Test Condition
RST Input Low Voltage
Minimum RST Low Time to
Generate a System Reset
VDD Ramp Time for
Power On
Min
Typ
0.75 x VIO
15
Max Units
V
0.6
V
µs
1
ms
Table 4. Voltage Regulator Electrical Specifications
–40 to +85 °C unless otherwise specified.
Parameter
Test Condition
Min Typ Max
Input Voltage Range
3.0 — 5.25
Output Voltage
Output Current = 1 to 100 mA*
3.3 3.45 3.6
VBUS Detection Input Threshold
2.5 —
Bias Current
— 120
*Note: The maximum regulator supply current is 100 mA. This includes the supply current of the CP2114.
Unit
V
V
V
µA
6
Rev. 1.1

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