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AN754

Understanding Microchip’s CAN Module Bit Timing

Microchip Technology 

AN754

Alternatively, the following equation can be used to

maintain synchronization during normal bus

operation:

SJW > (2∆f)(10NBT)

Solving for Oscillator Tolerance (∆f)

∆f < SJW ⁄ 20NBT

Configuring the Bit

In general, the longer the bus, the slower the maximum

data rate due to propagation delays on the line.

Increasing the oscillator tolerances between nodes can

greatly amplify the relationship.

CAN system designers must take this relationship into

consideration when defining the network. The following

examples demonstrate bit timings for achieving maxi-

mum oscillator tolerance or maximum bit rate.

EXAMPLE 2:

Maximum Oscillator

Tolerance

The maximum oscillator tolerance for a maximum data

rate is achieved when the phase segments 1 and 2 are

equal to the maximum synchronization jump width

(4TQ). Also, the propagation segment is minimum, indi-

cating a short bus and fast transceiver.

As indicated earlier, the propagation delay is twice the

delays of the bus, the receiver circuitry, and the driver.

tprop = 2(tbus + tcmp + tdrv)

Given:

tBUS = 50 m @ 5.5 ns/m = 275 ns

tCMP = 40 ns

tDRV = 60 ns

tPROP = 2(tBUS+tCMP+tDRV) = 750 ns

Since the propagation segment is used to compensate

for propagation delays and must be set to the minimum

1TQ, the implied time quantum = tPROP = 750 ns.

Figure 7 shows the bit timing.

FIGURE 7: BIT TIMING FOR MAXIMUM OSCILLATOR TOLERANCE

SyncSeg PropSeg

TQ

PhaseSeg1 (PS1)

Nominal Bit Time (NBT), tbit

TQ = tPROP = 750 ns

tbit = 10TQ = 7.5 µs → 133.3 kb/s

SyncSeg = 1TQ

PropSeg = tPROP = 1TQ

PS1 = SJWMAX = 4TQ

PS2 = SJWMAX = 4TQ

SJWMAX = 0.4NBT = 4TQ

PhaseSeg2 (PS2)

DS00754A-page 8

 2001 Microchip Technology Inc.

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