AS3843NT 查看數據表（PDF） - Astec Semiconductor => Silicon Link

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AS3843NT

Current Mode Controller

Astec Semiconductor => Silicon Link 

Current Mode Controller

AS384x

when operated at duty ratios greater than 50%.

Two different phenomena can occur as shown

graphically in Figure 22.

First, current-mode controllers detect and control

the peak inductor current, whereas the con-

verterÕs output corresponds to the average induc-

tor current. Figure 22(a) clearly shows that the

average inductor current (I1 & I2) changes as the

duty ratio (D1 & D2) changes. Note that for a fixed

control voltage, the peak current is the same for

any duty ratio. The difference between the peak

and average currents represents an error which

causes the converter to deviate from true

current-mode control.

the oscillator at pin 4, it is more practical to add

the slope compensation to the current waveform.

This can be implemented quite simply with the

addition of a single resistor, RSLOPE, between pin

4 and pin 3 as shown in Figure 23(a). RSLOPE, in

conjunction with the leading edge filter resistor,

R1 (Section 2.1), forms a divider network which

determines the amount of slope added to the

waveform. The amount of slope added to the cur-

rent waveform is inversely proportional to the

value of RSLOPE. It has been determined that the

amount of slope (m) required is equal to or

greater than 1/2 the downslope (m2) of the induc-

tor current. Mathematically stated:

Second, Figure 22(b) depicts how a small pertur-

bation of the inductor current (ÆI) can result in an

unstable condition. For duty ratios less than 50%,

the disturbance will quickly converge to a steady

state condition. For duty ratios greater than 50%,

ÆI progressively increases on each cycle, caus-

ing an unstable condition.

Both of these problems are corrected simultane-

ously by injecting a compensating ramp into

either the control voltage (VE) as shown in Figure

22(c) & (d), or to the current sense waveform at

pin 3. Since VE is not directly accessible, and, a

positive ramp waveform is readily available from

m ≥ m2

(7)

2

In some cases the required value of RSLOPE may

be low enough to affect the oscillator circuit and

thus cause the frequency to shift. An emitter fol-

lower circuit can be used as a buffer for RSLOPE

as depicted in Figure 23(b).

Slope compensation can also be used to improve

noise immunity in current mode converters oper-

ating at less than 50% duty ratio. Power supplies

operating under very light load can experience

IS

RSLOPE

R1

RS

8

VREG

RT

4

RT/CT

AS3842

CT

3 ISENSE

GND

5

OPTIONAL

BUFFER

IS

RSLOPE

R1

RS

8

VREG

RT

4

RT/CT

AS3842

CT

3 ISENSE

GND

5

(a)

(b)

Figure 23. Slope Compensation

ASTEC Semiconductor

19

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