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ADT7476AARQZ 查看數據表(PDF) - ON Semiconductor

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ADT7476AARQZ Datasheet PDF : 67 Pages
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ADT7476A
Because the actual fan TACH period is being measured,
falling below a fan TACH limit by 1 sets the appropriate
status bit and can be used to generate an SMBALERT.
Measuring fan TACH has the following caveat: When the
ADT7476A starts up, TACH measurements are locked. In
effect, an internal read of the low byte has been made for
each TACH input. The net result of this is that all TACH
readings are locked until the high byte is read from the
corresponding TACH registers. All TACH-related
interrupts are also ignored until the appropriate high byte is
read.
Once the corresponding high byte has been read, TACH
measurements are unlocked and interrupts are processed as
normal.
Fan TACH Limit Registers
The fan TACH limit registers are 16-bit values consisting
of two bytes.
Register 0x54, TACH1 Minimum Low Byte = 0xFF default
Register 0x55, TACH1 Minimum High Byte = 0xFF default
Register 0x56, TACH2 Minimum Low Byte = 0xFF default
Register 0x57, TACH2 Minimum High Byte = 0xFF default
Register 0x58, TACH3 Minimum Low Byte = 0xFF default
Register 0x59, TACH3 Minimum High Byte = 0xFF default
Register 0x5A, TACH4 Minimum Low Byte = 0xFF default
Register 0x5B, TACH4 Minimum High Byte = 0xFF default
Fan Speed Measurement Rate
The fan TACH readings are normally updated once every
second.
When set, the FAST bit (Bit 3) of Configuration
Register 3 (0x78) updates the fan TACH readings every
250 ms.
DC Bits
If any of the fans are not being driven by a PWM channel
but are powered directly from 5.0 V or 12 V, their associated
dc bit in Configuration Register 3 should be set. This allows
TACH readings to be taken on a continuous basis for fans
connected directly to a dc source. Once high frequency
mode is enabled in 4-wire fans, the dc bits do not need to be
set because this is automatically done internally.
Calculating Fan Speed
Assuming a fan with two pulses per revolution, and with
the ADT7476A programmed to measure two pulses per
revolution, fan speed is calculated by
Fan Speed (RPM) = (90,000 x 60)/Fan TACH Reading
where Fan TACH Reading is the 16-bit fan tachometer
reading.
Example:
TACH1 High Byte (0x29) = 0x17
TACH1 Low Byte (0x28) = 0xFF
What is Fan 1 speed in RPM?
Fan 1 TACH Reading = 0x17FF = 6143 (decimal)
RPM = (f x 60)/Fan 1 TACH Reading
RPM = (90,000 x 60)/6143
Fan Speed = 879 RPM
TACH Pulses per Revolution
Different fan models can output either one, two, three, or
four TACH pulses per revolution. Once the number of fan
TACH pulses has been determined, it can be programmed
into the TACH Pulses per Revolution Register (0x7B) for
each fan. Alternatively, this register can be used to determine
the number of pulses per revolution output by a given fan.
By plotting fan speed measurements at 100% speed with
different pulses per revolution settings, the smoothest graph
with the lowest ripple determines the correct pulses per
revolution value.
Fan Pulses per Revolution Register
[1:0] Fan 1 default = 2 pulses per revolution.
[3:2] Fan 2 default = 2 pulses per revolution.
[5:4] Fan 3 default = 2 pulses per revolution.
[7:6] Fan 4 default = 2 pulses per revolution.
00 = 1 pulse per revolution.
01 = 2 pulses per revolution.
10 = 3 pulses per revolution.
11 = 4 pulses per revolution.
Fan Spin-Up
The ADT7476A has a unique fan spin-up function. It
spins the fan at 100% PWM duty cycle until two TACH
pulses are detected on the TACH input. Once two TACH
pulses have been detected, the PWM duty cycle goes to the
expected running value, for example, 33%. Fans have
different spin-up characteristics and take different times to
overcome inertia. The advantage of the ADT7476A is that
it runs the fans just fast enough to overcome inertia and is
quieter on spin-up than fans that are programmed to spin up
for a given time.
Fan Startup Timeout
To prevent the generation of false interrupts as a fan spins
up (because it is below running speed), the ADT7476A
includes a fan startup timeout function. During this time, the
ADT7476A looks for two TACH pulses. If two TACH
pulses are not detected, an interrupt is generated.
Fan startup timeout can be disabled by setting Bit 5
(FSPDIS) of Configuration Register 1 (0x40).
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