N25Q128A23BSFH0F 查看數據表（PDF） - Numonyx -> Micron

零件编号

产品描述 (功能)

生产厂家

N25Q128A23BSFH0F

128-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Numonyx -> Micron 

N25Q128 - 3 V

Operating features

5.1.9

5.1.10

Active power and standby power modes

When Chip Select (S) is Low, the device is selected, and in the active power mode.

When Chip Select (S) is High, the device is deselected, but could remain in the active power

mode until all internal cycles have completed (program, erase, write status register). The

device then goes in to the standby power mode. The device consumption drops to ICC1.

Hold (or Reset) condition

The Hold (HOLD) signal is used to pause serial communications with the device without

resetting the clocking sequence. However, taking this signal Low does not terminate any

write status register, program or erase cycle that is currently in progress.

To enter the hold condition, the device must be selected, with Chip Select (S) Low.

The hold condition starts on the falling edge of the Hold (HOLD) signal, provided that the

Serial Clock (C) is Low (as shown in Figure 7).

The hold condition ends on the rising edge of the Hold (HOLD) signal, provided that the

Serial Clock (C) is Low.

If the falling edge does not coincide with Serial Clock (C) being Low, the hold condition

starts after Serial Clock (C) next goes Low. Similarly, if the rising edge does not coincide

with Serial Clock (C) being Low, the hold condition ends after Serial Clock (C) next goes

Low (this is shown in Figure 7).

During the hold condition, the serial data output (DQ1) is high impedance, and serial data

input (DQ0) and Serial Clock (C) are don’t care.

Normally, the device is kept selected, with Chip Select (S) driven Low for the whole duration

of the hold condition. This is to ensure that the state of the internal logic remains unchanged

from the moment of entering the hold condition.

If Chip Select (S) goes High while the device is in the Hold condition, this has the effect of

resetting the internal logic of the device. To restart communication with the device, it is

necessary to drive Hold (HOLD) High, and then to drive Chip Select (S) Low. This prevents

the device from going back to the hold condition.

Figure 7. Hold condition activation

C

HOLD

Hold

condition

(standard use)

Hold

condition

(non-standard use)

AI02029D

Reset functionality is available instead of Hold in parts with a dedicated part number. See

Section 16: Ordering information.

Driving Reset (Reset) Low while an internal operation is in progress will affect this operation

(write, program or erase cycle) and data may be lost. On Reset going Low, the device enters

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