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100329 查看數據表(PDF) - Fairchild Semiconductor

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100329 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
DIP ECL-to-TTL AC Electrical Characteristics
VEE = −4.2V to 5.7V, VTTL = +4.5V to +5.5V, VCC = VCCA = GND, CL = 50 pF
Symbol
Parameter
TC = 0°C
Min
Max
TC = 25°C
Min
Max
fMAX
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPHZ
tPLZ
tSET
tHOLD
tPW(H)
Max Toggle Frequency
CP to Tn
OE to Tn
(Enable Time)
OE to Tn
(Disable Time)
DIR to Tn
(Disable Time)
En to CP
En to CP
Pulse Width CP
125
125
3.1
7.2
3.1
7.2
3.4
8.45
3.7
8.95
3.8
9.2
4.0
9.2
3.2
8.95
3.3
8.95
3.0
7.7
3.4
8.7
2.7
8.2
2.8
8.7
2.8
7.45
3.1
7.95
1.1
1.1
2.1
2.1
4.1
4.1
TC = 85°C
Min
Max
125
3.3
7.7
4.0
9.7
4.3
9.95
3.5
9.2
4.1
9.95
3.1
8.95
4.0
9.2
1.1
2.6
4.1
Units
Conditions
MHz
ns
Figures 3, 4
ns Figures 3, 5
ns Figures 3, 5
ns Figures 3, 6
ns Figures 3, 4
ns Figures 3, 4
ns Figures 3, 4
PLCC and TTL-to-ECL AC Electrical Characteristics
VEE = −4.2V to 5.7V, VTTL = +4.5V to +5.5V
Symbol
Parameter
TC = 0°C
Min
Max
TC = 25°C
Min
Max
TC = 85°C
Min
Max
Units
Conditions
fMAX
tPLH
tPHL
tPZH
Max Toggle Frequency
CP to En
OE to En
(Cutoff to HIGH)
350
350
350
MHz
1.7
3.4
1.7
3.5
1.9
3.7
ns Figures 1, 2
1.3
4.0
1.5
4.2
1.7
4.6
ns Figures 1, 2
tPHZ
OE to En
(HIGH to Cutoff)
1.5
4.3
1.6
4.3
1.6
4.4
ns Figures 1, 2
tPHZ
DIR to En
(HIGH to Cutoff)
1.6
4.1
1.6
4.1
1.7
4.3
ns Figures 1, 2
tSET
Tn to CP
1.0
1.0
1.0
ns Figures 1, 2
tHOLD
Tn to CP
1.7
1.7
1.9
ns Figures 1, 2
tPW(H)
Pulse Width CP
2.0
2.0
2.0
ns Figures 1, 2
tTLH
Transition Time
0.6
1.6
0.6
1.6
0.6
1.6
ns Figures 1, 2
tTHL
20% to 80%, 80% to 20%
tOSHL
Maximum Skew Common Edge
PLCC Only
Output-to-Output Variation
200
200
200
ps (Note 9)
Data to Output Path
tOSLH
Maximum Skew Common Edge
PLCC Only
Output-to-Output Variation
200
200
200
ps (Note 9)
Data to Output Path
tOST
Maximum Skew Opposite Edge
PLCC Only
Output-to-Output Variation
650
650
650
ps (Note 9)
Data to Output Path
tPS
Maximum Skew
PLCC Only
Pin (Signal) Transition Variation
650
650
650
ps (Note 9)
Data to Output Path
Note 9: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite
directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design.
5
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