ADMC328TN-XXX-YY(RevC) 查看數據表（PDF） - Analog Devices
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ADMC328TN-XXX-YY Datasheet PDF : 32 Pages
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Parameter
Serial Ports
Timing Requirements:
tSCK
SCLK Period
tSCS
DR/TFS/RFS Setup before SCLK Low
tSCH
DR/TFS/RFS Hold after SCLK Low
tSCP
SCLKIN Width
Switching Characteristics:
tCC
tSCDE
tSCDV
tRH
CLKOUT High to SCLKOUT
SCLK High to DT Enable
SCLK High to DT Valid
TFS/RFSOUT Hold after SCLK High
tRD
tSCDH
TFS/RFSOUT Delay from SCLK High
DT Hold after SCLK High
tSCDD
SCLK High to DT Disable
tTDE
TFS (Alt) to DT Enable
tTDV
TFS (Alt) to DT Valid
tRDV
RFS (Multichannel, Frame Delay Zero) to DT Valid
Specifications subject to change without notice.
ADMC328
Min
Max
Unit
100
ns
15
ns
20
ns
40
ns
0.25 tCK 0.25 tCK + 20
ns
0
ns
30
ns
0
ns
30
ns
0
ns
30
ns
0
ns
25
ns
30
ns
CLKOUT
SCLK
DR
RFSIN
TFSIN
RFSOUT
TFSOUT
DT
TFS
(ALTERNATE
FRAME MODE)
RFS
(MULTICHANNEL MODE,
FRAME DELAY 0 [MFD = 0])
t CC
t CC
tSCS tSCH
t SCK
t SCP
t SCP
t RD
t RH
t SCDE
t SCDV
t TDE
t TDV
t SCDH
t SCDD
t RDV
Figure 2. Serial Port Timing
REV. C
–5–
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