LB1823 查看數據表（PDF） - SANYO -> Panasonic

零件编号

产品描述 (功能)

生产厂家

LB1823

Power Brushless Motor Predriver IC for OA Applications

SANYO -> Panasonic 

LB1823

4. Speed lock range

The speed lock range is ±6.25% of the rated speed, and the LD pin (which is an open collector output) will be low

when the motor speed is within the lock range. The LB1823 controls the motor speed to be within the lock range by

generating a speed error signal when the motor speed goes out of the lock range and adjusting the motor drive on

duty according to that signal.

5. PWM frequency

The PWM frequency is determined by R1 and C3, which are connected to the CR pin.

When R1 is connected to a 6.3 V power supply (the application circuit pin 17 voltage):

fPWM ≈ 1/(0.6 · C · R)

R1 must not be any smaller than 30 kΩ. A PWM frequency of 15 kHz is desirable. If the PWM frequency is too low,

the motor will resonate at the PWM frequency during motor constraint. This can result in disturbing audible

frequency noise. Inversely, the output transistor switching loss can become significant if the PWM frequency is too

high.

6. Grounding

The signal system ground must be separated from the output system ground, and these grounds must be connected to

a single ground point at the connector. The output system ground should be kept as short as possible since it carries

large current.

Output system ground – – The Rf (R10) ground side. The D1, D2, and D3 ground side.

Signal system ground – – The IC pin 24 and the IC peripheral circuit ground.

7. External interface pins

• LD pin

Output type: open collector

Breakdown voltage:8 V

Manufacturing variation in the saturation voltage (reference value at ILD = 10 mA)

0.10 to 0.30 V

• FGS pin

Output type: open collector

Breakdown voltage: 8 V

Manufacturing variation in the saturation voltage (reference value at IFGS = 2 mA)

0.05 to 0.10 V

The FGS pin outputs the FG amplifier output converted to a pulse signal by a hysteresis comparator. Thus FGS is a

speed monitor output. No pull-up resistor is required when unused.

• S/S pin

Input type: PNP transistor base with a 63 kΩ pull-up resistor to VCC

Threshold level: About 2.6 V (high to low), about 3.05 V (low to high)

(typical) Hysteresis: about 0.45 V

In the stop state, power is cut from all but certain circuits (the input, crystal oscillator and divider circuits) and the

LB1823 does not operate.

• F/R pin

Input type: PNP transistor base with a 50 kΩ pull-down resistor to ground

Threshold level: About 2.6 V (high to low), about 3.05 V (low to high)

(typical) Hysteresis: about 0.45 V

The forward/reverse direction must be switched in the stop state.

• BR pin

Input type: PNP transistor base with a 50 kΩ pull-down resistor to ground

Threshold level: About 2.6 V (high to low), about 3.05 V (low to high)

(typical) Hysteresis: about 0.45 V

Braking must be released in the stop mode.

No. 4263-8/11

Share Link: