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IS43TR16256A-093NBL(2016) 查看數據表(PDF) - Integrated Silicon Solution

零件编号
产品描述 (功能)
生产厂家
IS43TR16256A-093NBL
(Rev.:2016)
ISSI
Integrated Silicon Solution ISSI
IS43TR16256A-093NBL Datasheet PDF : 88 Pages
First Prev 81 82 83 84 85 86 87 88
IS43/46TR16256A, IS43/46TR16256AL,
IS43/46TR85120A, IS43/46TR85120AL
9.6.8 Derating values [ps] for DDR3-800/1066/1333/1600 tDS/tDH - AC/DC based AC135 Threshold
AC135 Threshold -> VIH(ac) = VREF(dc) + 135mV, VIL(ac) = VREF(dc) - 135mV
DC100 Threshold -> VIH(dc) = VREF(dc) + 100mV, VIL(dc) = VREF(dc) - 100mV
DQS, DQS# Differential Slew Rate
DDR3
4.0V/ns
3.0V/ns
2.0V/ns
1.8V/ns
1.6V/ns
1.4V/ns
1.2V/ns
ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH
2 68 50 68 50 68 50
-
-
-
-
-
-
-
-
1.5 45 34 45 34 45 34 53 42
-
-
-
-
-
-
1
0
0
0
0
0
0
8
8
16 16
-
-
-
-
DQ Slew 0.9 -
-
2
-4
2
-4
10
4
18 12 26 20
-
-
Rate 0.8 -
-
-
-
3
-10 11
-2
19
6
27 14 35 24
V/ns
0.7
-
-
-
-
-
-
14
-8
22
0
30
8
38 18
0.6 -
-
-
-
-
-
-
-
25 -10 33
-2
41
8
0.5 -
-
-
-
-
-
-
-
-
-
29 -16 37
-6
0.4 -
-
-
-
-
-
-
-
-
-
-
-
30 -26
1.0V/ns
ΔtDS
-
-
ΔtDH
-
-
-
-
-
-
-
-
46 34
49 24
45 10
38 -10
9.6.9 Required minimum time tVAC [ps] above VIH(ac) {below VIL(ac)} for valid DQ transition
Slew
Rate
[V/ns]
800/1066
AC175
DDR3
800/1066/1333/1600
800/1066/1333/1600
AC150
AC135
1866 2133 800/1066
AC160
DDR3L
800/1066/1333/1600
AC135
1866
AC130
> 2.0
75
105
113
93 73
165
113
95
2
57
105
113
93 73
165
113
95
1.5
50
80
90
70 50
138
90
73
1
38
30
45
25
5
85
45
30
0.9
34
13
30
Note Note
67
30
16
0.8
29
Note
11
Note Note
45
11
Note
0.7
Note
Note
Note
-
-
16
Note
-
0.6
Note
Note
Note
-
-
Note
Note
-
0.5
Note
Note
Note
-
2
Note
Note
-
< 0.5
Note
Note
Note
-
-
Note
Note
-
Note:
The rising input signal shall become equal to or greater than VIH(ac) level; and the falling input signal shall become equal to or less than VIL(ac) level.
Integrated Silicon Solution, Inc. www.issi.com
81
Rev. G2
07/28/2016

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