74VCX162839MTD(1999) 查看數據表（PDF） - Fairchild Semiconductor

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74VCX162839MTD
(Rev.:1999)

Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in the Outputs

Fairchild Semiconductor 

Connection Diagram

Logic Diagram

Truth Table

Inputs

CP

REGE

In

↑

H

H

↑

H

L

X

L

H

X

L

L

X

X

X

Outputs

OE

On

L

H

L

L

L

H

L

L

H

Z

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial (HIGH or LOW, inputs may not float)

Z = High Impedance

Functional Description

The 74VCX162839 consists of twenty selectable non-

inverting buffers or registers with word wide controls. Mode

functionality is selected through operation of the CP and

REGE pin as shown by the truth table. When REGE is held

at a logic “1” the device operates as a 20-bit register. Data

is transferred from In to On on the rising edge of the CP pin.

When the REGE pin is held at a logic “0” the device oper-

ates in a flow through mode and data propagates directly

from the In to the On outputs. All outputs can be 3-stated by

holding the OE pin at a logic “1.”

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