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N80L186EB8 查看數據表(PDF) - Intel

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N80L186EB8 Datasheet PDF : 59 Pages
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80C186EB 80C188EB 80L186EB 80L188EB
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Storage Temperature
Case Temp under Bias
Supply Voltage
with Respect to VSS
Voltage on other Pins
with Respect to VSS
b65 C to a150 C
b65 C to a120 C
b0 5V to a 6 5V
b0 5V to VCC a 0 5V
Recommended Connections
Power and ground connections must be made to
multiple VCC and VSS pins Every 80C186EB-based
circuit board should include separate power (VCC)
and ground (VSS) planes Every VCC pin must be
connected to the power plane and every VSS pin
must be connected to the ground plane Pins identi-
fied as ‘‘NC’’ must not be connected in the system
Liberal decoupling capacitance should be placed
near the processor The processor can cause tran-
sient power surges when its output buffers tran-
sition particularly when connected to large capaci-
tive loads
NOTICE This data sheet contains preliminary infor-
mation on new products in production It is valid for
the devices indicated in the revision history The
specifications are subject to change without notice
WARNING Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage
These are stress ratings only Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability
Low inductance capacitors and interconnects are
recommended for best high frequency electrical per-
formance Inductance is reduced by placing the de-
coupling capacitors as close as possible to the proc-
essor VCC and VSS package pins
Always connect any unused input to an appropriate
signal level In particular unused interrupt inputs
(INT0 4) should be connected to VCC through a pull-
up resistor (in the range of 50 KX) Leave any un-
used output pin or any NC pin unconnected
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