SM8578BV 查看數據表（PDF） - Nippon Precision Circuits

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SM8578BV

Real-time Clock IC

Nippon Precision Circuits  

BLOCK DIAGRAM

SM8578BV

VDD

VSS

XTN

XT

CD

OSC

Divider

OSC

Detect

Control Line

Clock and Calendar

Register

Divider and

Timer Counter

Control Register

INTN

Interrupt and FOUT

Controller

Alarm Register

CLK

DATA

CE

Input

Controller

Shift Register

Internal Bus

Control Circuit

PIN DESCRIPTION

Number

1

2

3

4

5

6

7

8

Name

INTN

XTN

XT

VSS

CE

CLK

DATA

VDD

I/O

Function

O

Timer interrupt/alarm interrupt output, determined by internal mode setting, or frequency output, with

frequency value given in the frequency set register (N-channel open-drain output)

O Oscillator output. Oscillator capacitor CD built-in.

I Oscillator input

– Negative supply voltage connection

I Chip enable input with pull-down resistance built-in. Internal registers can be accessed when CE is HIGH.

Serial data transfer clock input.

I In write mode, data is read in from DATA on the rising edge of CLK.

In read mode, data is read out from DATA on the rising edge of CLK.

I/O

Serial data transfer data input/output. When CE goes HIGH, the first four bits of write data determine the

operating mode (read mode/write mode).

– Positive supply voltage connection. A 0.1µF bypass capacitor should be connected between VDD and VSS.

NIPPON PRECISION CIRCUITS INC.—2

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