CXA3117AN 查看數據表（PDF） - Sony Semiconductor
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CXA3117AN Datasheet PDF : 30 Pages
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CXA3117AN
8)-3. Level Comparator Output
The level comparator characteristics are as shown in the figure below. Therefore, a high signal is output at
the bit border even if the input signal is a ±4.8kHz signal. This high output interval varies according to the
frequency response of the bit rate filter, and widens as the cut-off frequency becomes lower. The decoder
avoids this high interval when processing data.
Input signal
H
L
–4.8 –1.6 f0 +1.6 +4.8
Input frequency deviation [kHz]
Level comparator output
9) REG CONT
Controls the base bias of the external transistors.
10) LVA OUT
This pin goes high (open) when the supply voltage becomes low. Since the output is an open collector, it
can be used to directly drive CMOS device. The setting voltage of the LVA is 1.10V (typ.), and it possesses
a hysteresis with respect to the supply voltage. The hysteresis width is 10mV (typ.).
11) B.S.
Operation of the CXA3117AN can be halted by setting this pin low. This pin can be connected directly to
CMOS device. The current consumption during battery saving is 10µA or less (at 1.4V).
B.S.
17
Fig. 7
– 13 –
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