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ICS9148F-49 查看數據表(PDF) - Integrated Circuit Systems

零件编号
产品描述 (功能)
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ICS9148F-49
ICST
Integrated Circuit Systems ICST
ICS9148F-49 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Integrated
Circuit
Systems, Inc.
ICS9148-49
Pentium/ProTM System Clock Chip
General Description
The ICS9148-49 is part of a reduced pin count two-chip clock
solution for designs using an Intel BX style chipset.
Companion SDRAM buffers are ICS9179-03, -04 and -12.
There are two PLLs, with the first PLL capable of spread
spectrum operation. Spread spectrum typically reduces system
EMI by 8-10dB. The second PLL provides support for USB
48MHz requirements. CPU frequencies up to 100MHz are
supported.
Features
• 3CPUs @2.5V, up to 100MHz.
• 7PCIs @3.3V(including 1 free running, 1 Early).
• 1-48MHz(@3.3V)fixed.
• 1REF(3.3V,14.318MHz),1IOAPIC(2.5V,14.318MHz)
• Strong REF clock (1V/ns @ 50pf load)
• Excellent power management features including Power
down, PCI and CPU stops
• Spread Spectrum for EMI control(0.5% down spread)
• Early PCI (3.0ns ±250ps)
Block Diagram
Pin Configuration
Frequency Table:
SEL 100/66.6# CPU MHz
1
100
0
66.6
PCI MHz
33.3
33.3
9148-49 Rev D 1/12/99
28-pin SSOP (209mil body)
Power Groups
VDD1=REF0, X1, X2
VDD2=PCICLK_E , PCICLK_F , PCICLK(0:4)
VDD3=48MHz
VDDLC=CPUCLK(0:2)
VDDLA=IOAPIC
Ground Groups
GND1=REF0, X1, PLL CORE, X2, IOAPIC
GND2=PCICLK_E, PCICLK_F, PCICLK(04)
GND=CPUCLK
GND3 = 48MHz
Pentium is a trademark on Intel Corporation.
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.

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