A Microchip Technology Company
16 Mbit Multi-Purpose Flash Plus
SST39VF1601C / SST39VF1602C
Data Sheet
RY/BY#
0V
TRP
RST#
CE#/OE#
TRHR
1380 F29.0
Figure 18:RST# Timing Diagram (When no internal operation is in progress)
RY/BY#
RST#
TRY
TRP
CE#
TBR
OE#
Figure 19:RST# Timing Diagram (During Program or Erase operation)
1380 F30.0
VIHT
INPUT
VIT
REFERENCE POINTS
VOT
OUTPUT
VILT
1380F14.0
AC test inputs are driven at VIHT (0.9 VDD) for a logic ‘1’ and VILT (0.1 VDD) for a logic ‘0’. Mea-
surement reference points for inputs and outputs are VIT (0.5 VDD) and VOT (0.5 VDD). Input rise
and fall times (10% 90%) are <5 ns.
Note: VIT - VINPUT Test
VOT - VOUTPUT Test
VIHT - VINPUT HIGH Test
VILT - VINPUT LOW Test
Figure 20:AC Input/Output Reference Waveforms
©2011 Silicon Storage Technology, Inc.
27
DS-25018A
05/11