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SST39VF1601C-70-4C-EQE(2010) 查看數據表(PDF) - Silicon Storage Technology

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SST39VF1601C-70-4C-EQE
(Rev.:2010)
SST
Silicon Storage Technology SST
SST39VF1601C-70-4C-EQE Datasheet PDF : 33 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
16 Mbit Multi-Purpose Flash Plus
SST39VF1601C / SST39VF1602C
Data Sheet
TABLE 4: Pin Description
Symbol
AMS1-A0
Pin Name
Address Inputs
DQ15-DQ0 Data Input/output
WP#
RST#
CE#
OE#
WE#
VDD
VSS
NC
RY/BY#
Write Protect
Reset
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
No Connection
Ready/Busy#
1. AMS = Most significant address
AMS = A19
Functions
To provide memory addresses.
During Sector-Erase AMS-A11 address lines will select the sector.
During Block-Erase AMS-A15 address lines will select the block.
To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
To protect the top/bottom boot block from Erase/Program operation when grounded.
To reset and return the device to Read mode.
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide power supply voltage: 2.7-3.6V
Unconnected pins.
To output the status of a Program or Erase operation
RY/BY# is a open drain output, so a 10KΩ - 100KΩ pull-up resistor is required
to allow RY/BY# to transition high indicating the device is ready to read.
T4.2 1380
©2010 Silicon Storage Technology, Inc.
8
S71380-04-000
05/10

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