MCZ33975AEKR2 查看數據表（PDF） - Freescale Semiconductor

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MCZ33975AEKR2

Multiple Switch Detection Interface with Suppressed Wake-up and 32mA Wetting Current

Freescale Semiconductor 

ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

Table 4. Static Electrical Characteristics (continued)

Characteristics noted under conditions of 3.0V ≤ VDD ≤ 5.5V, 8.0V ≤ VPWR ≤ 28V, -40°C ≤ TC ≤ 125°C, unless otherwise

noted. Where applicable, typical values reflect the parameter’s approximate average value with VPWR = 13V, TA = 25°C.

Characteristic

Symbol

Min

Typ

Max

Unit

DIGITAL INTERFACE

Input Logic High-Voltage Thresholds(11)

Input Logic Low-Voltage Thresholds(11)

SCLK, SI, Tri-State SO Input Current

0.0 V to VDD

VIH

0.7 x VDD

–

VDD + 0.3

V

VIL

GND - 0.3

–

0.2 x VDD

V

ISCLK, ISI,

μA

ISO(TRI)

-10

–

10

CS Input Current

CS = VDD

ICS

μA

-10

–

10

CS Pull-Up Current

CS = 0.0V

ICS

μA

30

–

100

SO High-State Output Voltage

ISO(HIGH) = -200μA

VSO(HIGH)

VDD - 0.8

–

V

VDD

SO Low-State Output Voltage

ISO(HIGH) = 1.6mA

Input Capacitance on SCLK, SI, Tri-State SO(12)

INT Internal Pull-Up Current

VSO(LOW)

–

CIN

–

–

15

V

–

0.4

–

20

pF

40

100

μA

INT Voltage

INT = Open Circuit

V INT (HIGH)

VDD - 0.5

–

V

VDD

INT Voltage

IINT = 1.0mA

V INT (LOW)

–

V

0.2

0.4

WAKE Internal Pull-Up Current

WAKE Voltage

WAKE = Open Circuit

I WAKE (PU)

20

40

100

μA

V WAKE (HIGH)

V

4.0

4.3

5.3

WAKE Voltage

IWAKE = 1.0mA

WAKE Voltage(12)

Maximum Voltage Applied to WAKE Through External Pull-Up

V WAKE(LOW)

–

V WAKE(MAX)

–

V

0.2

0.4

V

–

40

Notes

11. Upper and lower logic threshold voltage levels apply to SI, CS, and SCLK.

12. This parameter is guaranteed by design however, is not production tested.

Analog Integrated Circuit Device Data

Freescale Semiconductor

33975

9

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