MT6260A/A 查看數據表（PDF） - MediaTek Inc

零件编号

产品描述 (功能)

生产厂家

MT6260A/A

GSM/GPRS/EDGE-RX SOC Processor Technical Brief

MediaTek Inc 

MT6260A

GSM/GPRS/EDGE-RX SOC Processor Technical Brief

v1.1 Confidential A

1.7 General Descriptions

Figure 2 is the block diagram of MT6260A.

Based on a multi- rocessor architecture,

MT6260A integrates an ARM7EJ-STM core, the

main processor unni g high-level

GSM/EDGE-Rx protoco software as well as

multimedia applications, single digital signal

processor core, which manages the low-level

MODEM and advanced audio functions, an

embedded processor running Bluetooth

baseband and link control pr tocol and the

Bluetooth radio control.

MT6260A consists of the following subsystems:

 Microcontroller Unit (MCU) subsystem:

Includes an ARM7EJ-STM RISC processor

and its accompanying memory

management and interrupt handling logics

 Digital Signal Processor (DSP) subsystem:

Includes a DSP and its accompanying

memory, memory controller and interrupt

controller

 MCU/DSP interface: Junction at which the

MCU and the DSP exchange hardware and

software information

 Microcontroller peripherals: Include all user

interface modules and RF control interface

modules

 Microcontroller coprocessors: Run

computing-intensive processes in place of

the microcontroller

 DSP peripherals: Hardware accelerators for

GSM/GPRS/EDGE-Rx channel codec

 Multimedia subsystem: Integrates several

advanced accelerators to support

multimedia applications

 Voice front-end: Data path for converting

analog speech to and from digital speech

 Audio front-end: Data path for converting

stereo audio from an audio source

 Baseband front-end: Data path for

converting a digital signal to and from an

analog signal from the RF modules

 Timing generator: Generates the control

signals related to the TDMA frame timing

 Power, reset and clock subsystem: Manage

the power, reset and clock distribution

inside MT6260A.

 Bluetooth subsystem: Includes an

embedded processor with embedded

ROM/RAM system, baseband processor,

and a high-performance radio block

 Power management unit: Self-contained

power supply source which also controls

the charging and system startup circuitry.

De ails of the individual subsystems and blocks

are descr bed in the following chapters.

MediaTek Confidential

© 2013 MediaTek Inc.

This document contains information that is proprietary to MediaTek Inc.

Unauthorized reproduction or disclosure of this informa ion in whole or in part is strictly prohibited.

Page 19 of 94

Share Link: