SG1842(2000) 查看數據表（PDF） - Microsemi Corporation
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SG1842 Datasheet PDF : 14 Pages
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PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
PRODUCTION DATA SHEET
T Y P I C A L A P P L I C A T I O N C I R C U I T S (continued)
VCC
VIN
SG1842/43
7(12)
VO
5V
8(14)
RT
2N222A
RSLOPE
From VO
Ri
Rd
CF
4(7)
CT
2(3)
RF
1(1)
UVLO
2.5V
S
5V
R REF
VREF
GOOD LOGIC
5V
INTERNAL
BIAS
OSCILLATOR
ERROR
AMP
2R
R
C.S.
COMP
1V
PWM
LATCH
5(9)
7(11)
Q1
6(10)
5(8)
R
3(5)
C
RS
FIGURE 23. — SLOPE COMPENSATION
Due to inherent instability of current mode converters running above 50% duty cycle, a slope compensation should be added to
either current sense pin or the error amplifier. Figure 23 shows a typical slope compensation technique.
4.7K
1K
ERROR AMP
ADJUST
4.7K
2N2222
100K
5K
ISENSE
ADJUST
RT
SG1842/43
1 COMP
VREF 8
2 VFB
VCC 7
3 ISENSE
OUTPUT 6
4 RTCT
GROUND 5
A
0.1µF 0.1µF
1K
VREF
VCC
OUTPUT
GROUND
CT
FIGURE 24. — OPEN LOOP LABORATORY FIXTURE
High-peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be
connected to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply
an adjustable ramp to pin 3.
Copyright © 2000
Rev. 1.6 4/00
13
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