ISL97686 查看數據表（PDF） - Renesas Electronics

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ISL97686

4-Channel LED Driver with Independent Channel Control for Dynamic Dimming

Renesas Electronics 

ISL97686

VSYNC FUNCTION

The VSYNC function is used to provide accurate LED dimming

frequencies and make sure that the video data is properly

aligned with the frame rate. A phase locked loop (PLL) is used to

lock the frequency to a multiple of the frame rate. Additionally,

the phase of the PWM output is aligned with the frame rate to

provide very predictable video performance. In VSYNC mode, the

FPWM pin is used as the PLL loop compensation pin and needs a

loop filter connected between it and ground.

Frame rates between 30Hz and 300Hz are supported, and an

automatic frequency detection circuit will provide the same

output frequency at 30, 60, 120, 180, 240, and 300Hz.

Additionally, the PWM dimming frequency can be pre-selected to

any of the following values shown in Table 1 (Note that for the

60Hz range, the frequencies will be scaled by a factor of

framerate/60Hz and for the 120Hz range they will be scaled by a

factor of framerate/120Hz).

TABLE 1. PRE-SELECTED PWM DIMMING FREQUENCY AT VSYNC MODE

DIMMING FREQUENCY

(Hz)

(kHz)

(kHz)

(kHz)

180

1.26

5.70

13.38

240

1.38

6.18

13.86

300

1.50

6.66

14.34

360

1.62

7.14

14.82

420

1.74

7.62

15.30

480

1.86

8.10

15.78

540

1.98

8.58

16.26

600

2.10

9.06

16.74

660

2.34

9.54

17.22

720

2.58

10.02

17.70

780

2.88

10.50

18.18

840

3.36

10.98

18.66

900

3.78

11.46

19.14

960

4.20

11.94

19.62

1.02k

4.74

12.42

20.10

1.14k

5.22

12.90

20.58

VOUT Control when LEDs are Off

When the backlight is enabled but all LEDs are off (i.e., during the

PWM off times), the switching regulator of a typical LED driver will

stop switching, which can allow the output to begin to discharge.

This is not a problem when the LED off times are short and the

duty cycle is running at a high duty cycle, or the output

capacitance is large. However, it presents two problems. First, for

low duty cycles at low frequencies, VOUT can droop between

on-times, resulting in under-regulation of the current when the

LEDs are next switched on. Second, at high PWM frequencies or

very low duty cycles, LED on-times can be shorter than the

minimum number of boost cycles needed to ramp up the

inductor current to the required level to support the load. For

example, a 1% on-time while running at 20kHz PWM dimming

frequency is only 500ns. If the boost switching frequency is set at

500kHz, this only represents a quarter of a switching cycle per

LED on-time, which may not be sufficient to ramp the inductor

current to the required level.

The ISL97686 incorporates an additional PFM switching

mechanism that allows the boost stage to continue to switch at

low current levels in order to replace the energy lost from the

output capacitor due to the OVP stack resistance and capacitor

self discharge. For very short pulses, this also means that the

charge delivered to the LEDs in the on-times is provided entirely

by the output capacitor, kept at the correct voltage by the PFM

mode in the off-times. This allows the output to always remain

very close to the required level, so that when the LEDs are

re-enabled, the boost output is already at the correct level. This

dramatically improves LED PWM performance, providing industry

leading linearity down to sub 1% levels, and reduces the

overshoots in the boost inductor current, caused by transient

switching when the LEDs are switched on, to a minimum.

The system will continue to maintain VOUT at the target level for

120ms after the last time the LEDs were on. If all LEDs are off for

a longer period than this, the converter will stop switching and go

into a sleep mode, allowing VOUT to decay, in order to save power

during long backlight-off periods.

Switching Frequency

The boost switching frequency can be adjusted by the resistor on

the OSC pin, which must be connected to AGND, and follows

Equation 4:

fSW = ---5-R-----O-1---0S---1-C--0----

(EQ. 4)

where fSW is the desirable boost switching frequency and ROSC is

the setting resistor.

5V and 2.4V Low Dropout Regulators

A 5V LDO regulator is used to provide the low voltage supply

needed to drive internal circuits. The output of this LDO is the VDC

pin. A decoupling capacitor of 1µF or more is required between

this pin and AGND for correct operation. Similarly, a 2.4V LDO

regulator is present at the VLOGIC pin, and also requires a 1µF

decoupling capacitor. Both pins can be used as a coarse voltage

reference, or as a supply for other circuits, but can only support a

load of up to ~10mA and should not be used to power noisy

circuits that can feed significant noise onto their supply.

Soft-Start and Boost Current Limit

The boost current limit should be set by using a resistor from CS

to PGND. The typical current limit can be calculated as:

ILIMIT = -R0---.-C-1---7S--

(EQ. 5)

The CS resistor should be chosen based on the maximum load

that needs to be driven. Typically, a limit of 30~40% more than is

required under DC conditions is sufficient to allow for necessary

overshoots during load transients. Values of 20~100mΩ are

supported.

FN7953 Rev.1.00

Sep 19, 2017

Page 11 of 22

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