TSB80C186EB25 查看數據表（PDF） - Intel

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TSB80C186EB25

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

Intel 

80C186EB 80C188EB 80L186EB 80L188EB

NOTES

1 READY must be low by either edge to cause a wait state

2 Lighter lines indicate READ cycles darker lines indicate WRITE cycles

Pin names in parentheses apply to 80C188EB 80L188EB

Figure 23 Ready Waveforms

272433 – 24

51

51

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