DAC08ESZ-REEL 查看數據表（PDF） - Analog Devices

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DAC08ESZ-REEL

8-Bit, High Speed, Multiplying D/A Converter

Analog Devices 

DAC08

APPLICATION INFORMATION

REFERENCE AMPLIFIER SETUP

The DAC08 is a multiplying D/A converter in which the output

current is the product of a digital number and the input reference

current. The reference current may be fixed or may vary from

nearly zero to 4.0 mA. The full-scale output current is a linear

function of the reference current and is given by

I FR



255

256



I REF

where IREF = I14

In positive reference applications, an external positive reference

voltage forces current through R14 into the VREF(+) terminal (Pin 14)

of the reference amplifier. Alternatively, a negative reference may be

applied to VREF(–) at Pin 15; reference current flows from ground

through R14 into VREF(+) as in the positive reference case. This

negative reference connection has the advantage of a very high

impedance presented at Pin 15. The voltage at Pin 14 is equal to

and tracks the voltage at Pin 15 due to the high gain of the internal

reference amplifier. R15 (nominally equal to R14) cancels bias

current errors; R15 may be eliminated with only a minor

increase in error.

Bipolar references may be accommodated by offsetting VREF or

Pin 15. The negative common-mode range of the reference

amplifier is given by VCM – = V− plus (IREF × 1 kΩ) plus 2.5 V.

The positive common-mode range is V+ less 1.5 V.

When a dc reference is used, a reference bypass capacitor is

recommended. A 5.0 V TTL logic supply is not recommended

as a reference. If a regulated power supply is used as a reference,

R14 must be split into two resistors with the junction bypassed

to ground with a 0.1 μF capacitor.

For most applications, the tight relationship between IREF and IFS

eliminates the need for trimming IREF. If required, full-scale

trimming can be accomplished by adjusting the value of R14, or

by using a potentiometer for R14. An improved method of full-

scale trimming that eliminates potentiometer T.C. effects is shown

in the recommended full-scale adjustment circuit (Figure 27).

Using lower values of reference current reduces negative power

supply current and increases reference amplifier negative common-

mode range. The recommended range for operation with a dc

reference current is 0.2 mA to 4.0 mA.

REFERENCE AMPLIFIER COMPENSATION FOR

MULTIPLYING APPLICATIONS

AC reference applications require the reference amplifier to be

compensated using a capacitor from Pin 16 to V−. The value of

this capacitor depends on the impedance presented to Pin 14;

for R14 values of 1.0 kΩ, 2.5 kΩ, and 5.0 kΩ, minimum values

of CC are 15 pF, 37 pF, and 75 pF. Larger values of R14 require

proportionately increased values of CC for proper phase margin,

so the ratio of CC (pF) to R14 (kΩ) = 15.

Data Sheet

For fastest response to a pulse, low values of R14 enabling small

CC values must be used. If Pin 14 is driven by a high impedance

such as a transistor current source, none of the preceding values

suffice, and the amplifier must be heavily compensated, which

decreases overall bandwidth and slew rate. For R14 = 1 kΩ and

CC = 15 pF, the reference amplifier slews at 4 mA/μs, enabling a

transition from IREF = 0 to IREF = 2 mA in 500 ns.

Operation with pulse inputs to the reference amplifier can be

accommodated by an alternate compensation scheme. This

technique provides lowest full-scale transition times. An internal

clamp allows quick recovery of the reference amplifier from a

cutoff (IREF = 0) condition. Full-scale transition (0 mA to 2 mA)

occurs in 120 ns when the equivalent impedance at Pin 14 is 200 Ω

and CC = 0. This yields a reference slew rate of 16 mA/μs, which

is relatively independent of the RIN and VIN values.

LOGIC INPUTS

The DAC08 design incorporates a unique logic input circuit that

enables direct interface to all popular logic families and provides

maximum noise immunity. This feature is made possible by the

large input swing capability, 2 μA logic input current, and

completely adjustable logic threshold voltage. For V− = −15 V, the

logic inputs may swing between −10 V and +18 V. This enables

direct interface with 15 V CMOS logic, even when the DAC08

is powered from a 5 V supply. Minimum input logic swing and

minimum logic threshold voltage are given by

V− + (IREF × 1 kΩ) + 2.5 V

The logic threshold may be adjusted over a wide range by

placing an appropriate voltage at the logic threshold control pin

(Pin 1, VLC). Figure 16 shows the relationship between VLC and

VTH over the temperature range, with VTH nominally 1.4 above

VLC. For TTL and DTL interface, simply ground Pin 1. When

interfacing ECL, an IREF = 1 mA is recommended. For interfacing

other logic families, see Figure 32. For general set-up of the logic

control circuit, note that Pin 1 sources 100 μA typical; external

circuitry must be designed to accommodate this current.

Fastest settling times are obtained when Pin 1 sees a low

impedance. If Pin 1 is connected to a 1 kΩ divider, for example,

it must be bypassed to ground by a 0.01 μF capacitor.

ANALOG OUTPUT CURRENTS

Both true and complemented output sink currents are provided

where IO + IO = IFS. Current appears at the true (IO) output when

a 1 (logic high) is applied to each logic input. As the binary count

increases, the sink current at Pin 4 increases proportionally, in

the fashion of a positive logic DAC. When a 0 is applied to any

input bit, that current is turned off at Pin 4 and turned on at Pin 2.

A decreasing logic count increases IO as in a negative or inverted

logic DAC. Both outputs may be used simultaneously.

Rev. D | Page 14 of 21

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