ISL8201M 查看數據表（PDF） - Renesas Electronics
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ISL8201M Datasheet PDF : 16 Pages
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ISL8201M
application to see if there is any problem. If PVCC powers up first
and the VIN is not present by the time the initialization is done,
then the soft-start will not be able to ramp the output, and the
output will later follow part of the VIN ramp when it is applied. If
this is not desired, then change the sequencing of the supplies,
or use the COMP/EN pin to disable VOUT until both supplies are
ready.
Figure 20 shows a simple sequencer for this situation. If PVCC
powers up first, Q1 will be off, and R3 pulling to PVCC will turn
Q2 on, keeping the ISL8201M in shut-down. When VIN turns
on, the resistor divider R1 and R2 determines when Q1 turns
on, which will turn off Q2 and release the shut-down. If VIN
powers up first, Q1 will be on, turning Q2 off; so the ISL8201M
will start-up as soon as PVCC comes up. The VENDIS trip point
is 0.4V nominal, so a wide variety of N-MOSFET or NPN BJT
or even some logic IC's can be used as Q1 or Q2. However, Q2
must be low leakage when off (open-drain or open-collector) so
as not to interfere with the COMP output. Q2 should also be
placed near the COMP/EN pin.
VIN
PVCC
R1
R3
TO COMP/EN
R2
Q1
Q2
FIGURE 20. SEQUENCE CIRCUIT
The VIN range can be as low as ~1V (for VOUT as low as the
0.6V reference) and as high as 20V. There are some
restrictions for running high VIN voltage. The maximum PHASE
voltage is 30V. The VIN + PVCC + any ringing or other
transients on the PHASE pin must be less than 30V. If VIN is
20V, it is recommended to limit PVCC to 5V.
Switching Frequency
The switching frequency is a fixed 600kHz clock, which is
determined by the internal oscillator. However, all of the other
timing mentioned (POR delay, OCP sample, soft-start, etc.) is
independent of the clock frequency (unless otherwise noted).
Selection of the Input Capacitor
The input filter capacitor should be based on how much ripple
the supply can tolerate on the DC input line. The larger the
capacitor, the less ripple expected but consideration should be
taken for the higher surge current during power-up. The
ISL8201M provides the soft-start function that controls and
limits the current surge. The value of the input capacitor can be
calculated by Equation 5:
CIN = -I-I--N------V---------t
(EQ. 5)
Where:
CIN is the input capacitance (µF)
IIN is the input current (A)
t is the turn on time of the high-side switch (µs)
V is the allowable peak-to-peak voltage (V)
In addition to the bulk capacitance, some low Equivalent Series
Inductance (ESL) ceramic capacitance is recommended to
decouple between the drain terminal of the high-side MOSFET
and the source terminal of the low-side MOSFET. This is used
to reduce the voltage ringing created by the switching current
across parasitic circuit elements.
Output Capacitors
The ISL8201M is designed for low output voltage ripple. The
output voltage ripple and transient requirements can be met
with bulk output capacitors (COUT) with low enough Equivalent
Series Resistance (ESR). COUT can be a low ESR tantalum
capacitor, a low ESR polymer capacitor or a ceramic capacitor.
The typical capacitance is 330µF and decoupled ceramic
output capacitors are used. The internally optimized loop
compensation provides sufficient stability margins for all
ceramic capacitor applications with a recommended total value
of 400µF. Additional output filtering may be needed if further
reduction of output ripple or dynamic transient spike is
required.
Layout Guide
To achieve stable operation, low losses, and good thermal
performance some layout considerations are necessary.
CPVCC
PGND
VIN
RFB
VOUT
CIN
COUT1
(DECOUPLE)
PGND
FIGURE 21. RECOMMENDED LAYOUT
• The ground connection between pin 11 and pins 1 to 4
should be a solid ground plane under the module.
• Place a high frequency ceramic capacitor between (1) VIN
and PGND (pin 11) and (2) PVCC and PGND (pins 1 to 4) as
FN6657 Rev 3.00
October 28, 2014
Page 12 of 16
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