M48T35MH(2011) 查看數據表（PDF） - STMicroelectronics
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M48T35MH Datasheet PDF : 28 Pages
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M48T35, M48T35Y
Clock operations
Note:
Table 5. Register map
Data
Address
D7 D6 D5 D4 D3 D2 D1 D0
Function/range
BCD format
7FFFh
7FFEh 0
10 Years
0
0
10 M.
Year
Month
Year
Month
00-99
01-12
7FFDh 0
0
10 date
7FFCh 0 FT CEB CB 0
7FFBh 0
0
10 hours
Date
Day
Hours
Date
Century/
day
Hours
01-31
00-01/01-07
00-23
7FFAh 0
7FF9h ST
7FF8h W
10 minutes
10 seconds
R
S
Minutes
Seconds
Calibration
Minutes
Seconds
Control
00-59
00-59
Keys:
S = SIGN bit
FT = FREQUENCY TEST bit (must be set to '0' upon power for normal operation)
R = READ bit
W = WRITE bit
ST = STOP bit
0 = Must be set to '0'
CEB = CENTURY ENABLE bit
CB = CENTURY bit
When CEB is set to '1,' CB will toggle from '0' to '1' or from '1' to '0' at the turn of the century
(dependent upon the initial value set).
When CEB is set to '0,' CB will not toggle. The WRITE bit does not need to be set to write to
CEB.
3.4
Calibrating the clock
The M48T35/Y is driven by a quartz-controlled oscillator with a nominal frequency of
32,768 Hz. The devices are tested not to exceed 35 ppm (parts per million) oscillator
frequency error at 25 °C, which equates to about ±1.53 minutes per month. With the
calibration bits properly set, the accuracy of each M48T35/Y improves to better than +1/–2
ppm at 25 °C.
The oscillation rate of any crystal changes with temperature (see Figure 8 on page 15).
Most clock chips compensate for crystal frequency and temperature shift error with
cumbersome “trim” capacitors. The M48T35/Y design, however, employs periodic counter
correction. The calibration circuit adds or subtracts counts from the oscillator divider circuit
at the divide by 256 stage, as shown in Figure 9 on page 15. The number of times pulses
are blanked (subtracted, negative calibration) or split (added, positive calibration) depends
upon the value loaded into the five calibration bits found in the control register. Adding
counts speeds the clock up, subtracting counts slows the clock down.
The calibration byte occupies the five lower order bits (D4-D0) in the control register 7FF8h.
These bits can be set to represent any value between 0 and 31 in binary form. Bit D5 is the
Doc ID 2611 Rev 10
13/28
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