LTC1142 查看數據表（PDF） - Linear Technology
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LTC1142 Datasheet PDF : 20 Pages
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LTC1142/LTC1142L/LTC1142HV
APPLICATIO S I FOR ATIO
To prevent stray pickup a 100pF capacitor is suggested
across R1 located close to the LTC1142HV-ADJ/LTC1142L-
ADJ as in Figure 6. The external divider network must be
placed across COUT with the negative plate of COUT returned
to signal ground. Refer to the Board Layout Checklist.
VFB
[PIN 2(16)]
SGND
[PIN 4(18)]
100pF
R2
R1
RSENSE
+
VOUT
COUT
1142 F06
Figure 6. LTC1142-ADJ External Feedback Network
Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1142. These items are also illustrated graphically in
the layout diagram of Figure 7. In general each block
should be self-contained with little cross coupling for best
performance. Check the following in your layout:
1. Are the signal and power grounds segregated? The
LTC1142 signalground[Pin 3 (17) for the LTC1142, Pin
4 (18) for LTC1142-ADJ] must return to the (–) plate of
COUT. The power ground returns to the source of the
N-channel MOSFET, anode of the Schottky diode,
and (–) plate of CIN, which should have as short lead
lengths as possible.
2. Does the LTC1142 Sense – , Pin 28 (14) connect to a
point close to RSENSE and the (+) plate of COUT?
3. Are the Sense – and Sense + leads routed together with
minimum PC trace spacing? The 1000pF capacitor
between Pins 1 (15) and 28 (14) should be as close as
possible to the LTC1142. Ensure accurate current sens-
1000pF
SENSE RESISTOR PCB PATTERN
+
RSENSE3
VOUT3
–
–
VIN3
+
COUT3
SHDN (3.3V OUTPUT)
L1
N-CH
D1
CIN3
P-CH
1µF +
VIN5
3300pF
CT5
1k
1 SENSE +3
SENSE –3 28
2
SHDN3
3 SGND3
4
PGND3
5 NC
6
NDRIVE 3
27
ITH3
26
INTVCC3
25
CT3
24
VIN3
PDRIVE 3 23
7 NC
NC 22
8 NC
LTC1142
NC 21
9 PDRIVE 5
10
VIN5
11
CT5
12
INTVCC5
13
ITH5
14 SENSE–5
20
NDRIVE 5
NC 19
18
PGND5
17
SGND5
16
SHDN5
SENSE+5 15
1k
3300pF
VIN3
1µF
SHDN (5V OUTPUT)
SENSE+ SENSE–
CT3
+
P-CH
CIN5
D2
N-CH
VIN5
–
L2
COUT5 +
–
VOUT5
RSENSE5
+
BOLD LINES INDICATE HIGH CURRENT PATHS
1000pF
1142 F07
Figure 7. LTC1142 Layout Diagram (see Board Layout Checklist)
15
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