HI5735 查看數據表（PDF） - Renesas Electronics
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HI5735 Datasheet PDF : 11 Pages
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HI5735
as glitch when changing the DAC output. Units are typically
specified in picoVolt-seconds (pV-s).
HI5735
(21) IOUT
100MHz
LOW PASS
FILTER
SCOPE
64
50
FIGURE 12. GLITCH TEST CIRCUIT
Applications
Bipolar Applications
a (mV)
t (ns)
GLITCH ENERGY = (a x t)/2
FIGURE 13. MEASURING GLITCH ENERGY
To convert the output of the HI5735 to a bipolar 4V swing, the
following applications circuit is recommended. The reference
can only provide 125A of drive, so it must be buffered to create
the bipolar offset current needed to generate the -2V output with
all bits “off”. The output current must be converted to a voltage
and then gained up and offset to produce the proper swing. Care
must be taken to compensate for the voltage swing and error.
REF OUT
(26)
-
+
5k
1/2 CA2904
HI5735
50
IOUT
(21)
5k
-
+
1/2 CA2904
0.1F
60
240
240
-
VOUT
+
HFA1100
FIGURE 14. BIPOLAR OUTPUT CONFIGURATION
Definition of Specifications
Integral Linearity Error, INL, is the measure of the worst case
point that deviates from a best fit straight line of data values
along the transfer curve.
Differential Linearity Error, DNL, is the measure of the error
in step size between adjacent codes along the converter’s
transfer curve. Ideally, the step size is 1 LSB from one code to
the next, and the deviation from 1 LSB is known as DNL. A
DNL specification of greater than -1 LSB guarantees
monotonicity.
Feedthru, is the measure of the undesirable switching noise
coupled to the output.
Output Voltage Full Scale Settling Time, is the time required
from the 50% point on the clock input for a full scale step to
settle within an 1/2 LSB error band.
Output Voltage Small Scale Settling Time, is the time
required from the 50% point on the clock input for a 100mV
step to settle within an 1/2 LSB error band. This is used by
applications reconstructing highly correlated signals such as
sine waves with more than 5 points per cycle.
Glitch Area, GE, is the switching transient appearing on the
output during a code transition. It is measured as the area
under the curve and expressed as a picoVolt•Time
specification (typically pV•s).
Differential Gain, AV, is the gain error from an ideal sine
wave with a normalized amplitude.
Differential Phase, , is the phase error from an ideal sine
wave.
Signal to Noise Ratio, SNR, is the ratio of a fundamental to
the noise floor of the analog output. The first 5 harmonics are
ignored, and an output filter of 1/2 the clock frequency is used
to eliminate alias products.
Total Harmonic Distortion, THD, is the ratio of the DAC
output fundamental to the RMS sum of the harmonics. The first
5 harmonics are included, and an output filter of 1/2 the clock
frequency is used to eliminate alias products.
Spurious Free Dynamic Range, SFDR, is the amplitude
difference from a fundamental to the largest harmonically or
non-harmonically related spur. A sine wave is loaded into the
D/A and the output filtered at 1/2 the clock frequency to
eliminate noise from clocking alias terms.
Intermodulation Distortion, IMD, is the measure of the sum
and difference products produced when a two tone input is
driven into the D/A. The distortion products created will arise at
sum and difference frequencies of the two tones. IMD can be
calculated using the following equation:
IMD = 2----0----L---o----g------(--R----M-R----S-M-----oS---f---AS----mu----m-p----l-ia-t--u-n--d-d---e--D---o-i--ff-f--et--h-r--ee----n-F--c--u-e--n---D-d---ai--s-m--t-o--e--r--nt--i-ot--a-n--l---P----r--o----d---u---c---t--s---).
FN4133 Rev 4.00
May 2003
Page 9 of 11
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