GTL2007 查看數據表（PDF） - NXP Semiconductors.
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GTL2007 Datasheet PDF : 20 Pages
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NXP Semiconductors
5. Functional diagram
GTL2007
12-bit GTL to LVTTL translator with power good control
GTL VREF
1AO
LVTTL outputs
2AO
5A
LVTTL inputs/outputs
(open-drain)
6A
LVTTL input EN1
GTL input 11BI
GTL2007
1
2
3
4
5
6
7
LVTTL input/output
(open-drain)
11A
8
GTL input 9BI
9
3AO
10
LVTTL outputs
4AO
11
&
&
1
DELAY(1)
DELAY(1)
27
1BI
GTL inputs
26
2BI
25
7BO1
GTL outputs
24
7BO2
23
EN2 LVTTL input
22
11BO GTL output
21
5BI
20
6BI
GTL inputs
19
3BI
18
4BI
10AI1
12
LVTTL inputs
10AI2
13
1
17
10BO1
1
GTL outputs
16
10BO2
15
9AO LVTTL output
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(1) The enable on 7BO1/7BO2 include a delay that prevents the transient condition where 5BI/6BI go from LOW to HIGH, and
the LOW to HIGH on 5A/6A lags up to 100 ns from causing a LOW glitch on the 7BO1/7BO2 outputs.
Fig 1. Logic diagram of GTL2007
GTL2007_2
Product data sheet
Rev. 02 — 16 February 2007
© NXP B.V. 2007. All rights reserved.
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