MB89610R 查看數據表（PDF） - Fujitsu

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MB89610R

8-bit Proprietary Microcontroller

Fujitsu 

MB89610R Series

(7) Bus Write Timing

Parameter

Symbol

Pin

Valid address → ALE

↓ time

tAVLL

ALE ↓ time → address

invalid time

tLLAX

Valid address → WR ↓ time tAVWL

WR pulse width

tWLWH

Write data → WR ↑ time

tDVWH

WR ↑ → address invalid time tWHAX

WR ↑ → data hold time

WR ↑ → ALE ↑ time

WR ↓ → CLK ↑ time

CLK ↓ → WR ↑ time

ALE pulse width

ALE ↓ → CLK ↑ time

tWHDX

tWHLH

tWLCH

tCLWH

tLHLL

tLLCH

AD7 to 0,

ALE,

A15 to 08

WR, ALE

WR

AD7 to 0,

WR

WR, A15 to

08

AD7 to 0,

WR

WR, ALE

WR, CLK

WR, CLK

ALE

ALE, CLK

(VCC = +5.0 V±10%, FC = 10 MHz, VSS = 0.0 V, TA = –40°C)

Condition

Value

Min.

Max.

Unit Remarks

1/4 tinst* – 64 ns*2

—

µs

5*2

—

ns

1/4 tinst* – 60 ns*2

—

µs

1/2 tinst* – 20 ns*2

—

µs

1/2 tinst* – 60 ns*2

—

µs

—

1/4 tinst* – 40 ns*2

—

µs

1/4 tinst* – 40 ns*2

—

µs

1/4 tinst* – 40 ns*2

—

µs

1/4 tinst* – 40 ns*2

—

µs

0

—

ns

1/4 tinst* – 35 ns*2

—

µs

1/4 tinst* – 30 ns*2

—

µs

*1: For information on tinst, see “(4) Instruction Cycle.”

*2: These characteristics are also applicable to the bus read timing.

CLK

ALE

AD

A

WR

2.4 V

tLHLL

tLLCH

2.4 V

0.8 V

tAVLL

2.4 V 2.4 V

tLLAX

2.4 V

0.8 V 0.8 V

0.8 V

tDVWH

2.4 V

0.8 V

tAVWL

tWLCH

tWLWH

0.8 V

tWHLH

0.8 V

2.4 V

0.8 V

tWHDX

2.4 V

tCLWH

0.8 V

tWHAX

2.4 V

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