NT256D64S88AAG-6 查看數據表（PDF） - Unspecified
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NT256D64S88AAG-6 Datasheet PDF : 14 Pages
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NT256D64S88AAG
256MB : 32M x 64
PC2700 Unbuffered DIMM
AC Timing Specifications for DDR SDRAM Devices Used on Module
(TA = 0 °C ~ 70 °C; VDDQ = 2.5V ± 0.2V; VDD = 2.5V ± 0.2V, See AC Characteristics) (Part 2 of 2)
Symbol
Parameter
tIS
tIPW
tRPRE
tRPST
tRAS
tRC
Address and control input setup time (slow slew
rate)
Input pulse width
Read preamble
Read postamble
Active to Precharge command
Active to Active/Auto-refresh command period
-6
Min.
Max.
1.0
2.2
Unit
Notes
2, 3, 4,
ns
10, 11,
12, 14
2, 3, 4,
ns
12
0.9
1.1
tCK
1,2,3,4
0.40
0.60
tCK
1,2,3,4
45
120,000
ns
1,2,3,4
65
ns
1,2,3,4
Auto-refresh to Active/Auto-refresh command
tRFC
75
period
ns
1,2,3,4
tRCD
tRAP
tRP
tRRD
tWR
tDAL
Active to Read or Write delay
Active to Read Command with Auto-precharge
Precharge command period
Active bank A to Active bank B command
Write recovery time
Auto precharge write recovery + recharge time
20
20
20
15
15
(tWR/tCK)
+ (tRP/tCK)
ns
1,2,3,4
ns
1,2,3,4
ns
1,2,3,4
ns
1,2,3,4
ns
1,2,3,4
1, 2, 3,
tCK
4, 13
tWTR
Internal write to read command delay
1
tCK
1,2,3,4
tXSNR
Exit self-refresh to non-read command
75
ns
1,2,3,4
tXSRD
tREFI
Exit self-refresh to read command
Average Periodic Refresh Interval
200
tCK
1,2,3,4
1, 2, 3,
7.8
µs
4, 8
REV 1.0 06 / 2002
12
© NANYA TECHNOLOGY CORP.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
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