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PACVGA201 Datasheet PDF : 6 Pages
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PACVGA201
VGA Port Companion Circuit
Product Description
The PACVGA201 provides seven channels of ESD protection for
all signal lines commonly found in a VGA port. ESD protection is
implemented with current−steering diodes designed to safely handle
the high surge currents encountered with IEC−61000−4−2 Level−4
ESD Protection (8 kV contact discharge). When a channel is
subjected to an electrostatic discharge, the ESD current pulse is
diverted via the protection diodes into the positive supply rail or
ground where it may be safely dissipated.
Separate positive supply rails are provided for the VIDEO,
DDC_OUT and SYNC channels to facilitate interfacing with
low−voltage video controller ICs and to provide design flexibility in
multiple−supply−voltage environments.
An internal diode (D1, in schematic below) is provided such that
VCC2 is derived from VCC3 (VCC2 does not require an external power
supply input). In applications where VCC3 may be powered down,
diode D1 blocks any DC current path from the DDC_OUT pins back to
the powered down VCC3 rail via the upper ESD protection diodes.
Two non−inverting drivers provide buffering for the HSYNC and
VSYNC signals from the Video Controller IC (SYNC_IN1,
SYNC_IN2). These buffers accept TTL input levels and convert them
to CMOS output levels that swing between Ground and VCC3.
When the PWR_UP input is driven LOW, the SYNC outputs are
driven LOW and the SYNC inputs can float: no current will be drawn
from the VCC3 supply.
The PACVGA201 is housed in a 16−pin QSOP package with RoHS
compliant lead−free finishing.
Features
Seven Channels of ESD Protection for All VGA Port Connector
Pins
Meets IEC−61000−4−2 Level−4 ESD Requirements
(8 kV Contact Discharge)
Very Low Loading Capacitance from ESD Protection Diodes on
VIDEO Lines, 4pF Typical
TTL to CMOS Level−Translating Buffers with Power Down
Mode for HSYNC and VSYNC Lines
Three Power Supplies for Design Flexibility
Compact 16−Pin QSOP Package
These Devices are Pb−Free and are RoHS Compliant
Applications
ESD Protection and Termination Resistors for VGA (Video) Port
Interfaces
Desktop PCs
Notebook Computers
LCD Monitors
http://onsemi.com
QSOP16
QR SUFFIX
CASE 492
MARKING DIAGRAM
PACVGA
201QR
YYWWG
PACVGA 201QR = Specific Device Code
YY
= Year
WW
= Work Week
G
= Pb−Free Package
ORDERING INFORMATION
Device
PACVGA201QR
Package
Shipping†
QSOP16 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2011
1
October, 2011 − Rev. 4
Publication Order Number:
PACVGA201/D
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