MAX122ACAG 查看數據表（PDF） - Maxim Integrated

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MAX122ACAG

500ksps, 12-Bit ADCs with Track/Hold and Reference

Maxim Integrated 

MAX120/MAX122

500ksps, 12-Bit ADCs with Track/Hold

and Reference

Timing Characteristics

(VDD = +5V, VSS = -12V to -15V, 100% tested, TA = TMIN to TMAX, unless otherwise noted.) (Note 7)

PARAMETER

CS to RD Setup Time

CS to RD Hold Time

CONVST Pulse Width

RD Pulse Width

Data-Access Time

Bus-Relinquish Time

RD or CONVST to BUSY

CLKIN to BUSY or INT

CLKIN to BUSY Low

RD to INT High

BUSY or INT to Data Valid

Acquisition Time (Note 8)

Aperture Delay (Note 8)

Aperture Jitter (Note 8)

SYMBOL

CONDITIONS

tCS

tCH

tCW

tRW

tDA

tDH

tB0

tB1

tB2

tIH

tBD

tACQ

tAP

CL = 100pF

CL = 50pF

CL = 50pF

In mode 5

CL = 50pF

CL (Data) = 100pF,

CL (INT, BUSY) = 50pF

TA = +25°C

MIN TYP MAX

0

0

30

tDA

40

75

30

50

30

75

70 110

45

90

30

50

MAX12_C/E

MIN TYP MAX

0

0

30

tDA

100

65

100

150

120

75

20

30

350

350

10

30

UNITS

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ps

Note 1: These tests are performed at VDD = 5V, VSS = -15V. Operation over supply is guaranteed by supply rejection tests.

Note 2: Ideal full-scale transition is at +5V - 3/2 LSB = +4.9963V, adjusted for offset error.

Note 3: Supply rejection defined as change in full-scale transition voltage with the specified change in supply voltage = (FS at nomi-

nal supply)- (FS at nominal supply ± tolerance), expressed in LSBs.

Note 4: For design guidance only, not tested.

Note 5: Temperature drift is defined as the change in output voltage from +25°C to TMIN or TMAX. It is calculated as TC = ΔVREF/

VREF/(ΔT).

Note 6: VCS = VRD = VCONVST = 0V, VMODE = 5V.

Note 7: Control inputs specified with tr = tf = 5ns ( 10% to 90% of +5V) and timed from a 1.6V voltage level. Output delays are

measured to +0.8V if going low, or +2.4V if going high. For bus-relinquish time, a change of 0.5V is measured. See Figures

1 and 2 for load circuits.

Note 8: For design guidance only, not tested.

Pin Description

PIN

NAME

1

MODE

2

VSS

3

VDD

4

AIN

5

VREF

FUNCTION

Mode Input. Hardwire to set operational mode.

VDD: Single conversion, INT Output

OPEN: Single conversion, BUSY Output

DGND: Continuous conversions, BUSY Output

Negative Power Supply, -12V or -15V

Positive Power Supply, +5V

Sampling Analog Input, ±5V bipolar input range

-5V Reference Output. Bypass to AGND with 22µF || 0.1µF.

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