M48Z58 查看數據表（PDF） - STMicroelectronics
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M48Z58 Datasheet PDF : 24 Pages
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M48Z58, M48Z58Y
1
Description
Description
The M48Z58/Y ZEROPOWER® RAM is an 8 Kbit x 8 non-volatile static RAM that integrates
power-fail deselect circuitry and battery control logic on a single die. The monolithic chip is
available in two special packages to provide a highly integrated battery-backed memory
solution.
The M48Z58/Y is a non-volatile pin and function equivalent to any JEDEC standard 8 K x 8
SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets, providing the
non-volatility of PROMs without any requirement for special WRITE timing or limitations on
the number of WRITEs that can be performed.
The 28-pin, 600 mil DIP CAPHAT™ houses the M48Z58/Y silicon with a long life lithium
button cell in a single package.
The 28-pin, 330 mil SOIC provides sockets with gold plated contacts at both ends for direct
connection to a separate SNAPHAT® housing containing the battery. The unique design
allows the SNAPHAT battery package to be mounted on top of the SOIC package after the
completion of the surface mount process. Insertion of the SNAPHAT housing after reflow
prevents potential battery damage due to the high temperatures required for device surface-
mounting. The SNAPHAT housing is keyed to prevent reverse insertion.
The SOIC and battery packages are shipped separately in plastic anti-static tubes or in tape
& reel form.
For the 28-lead SOIC, the battery package (e.g., SNAPHAT) part number is “M4Z28-
BR00SH1”.
Figure 1. Logic diagram
VCC
13
A0-A12
8
DQ0-DQ7
W
M48Z58
M48Z58Y
E
G
VSS
AI01176B
Doc ID 2559 Rev 11
5/24
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