PIN ASSIGNMENTS
AGND 1
DGND
2
DVDD
3
DVDD
4
OGND 5
OVDD
6
CLK 7
OE 8
D0 (LSB) 9
D1 10
D2 11
PIN FUNCTIONS
Pin Name Description
AGND Analog ground
DGND Digital ground
33 RDY
DVDD
Digital +5.0 V supply
32 N/C
OGND Ground for digital I/O
31 N/C
OVDD
Digital outputs supply (+3.3/5 V)
30
RS
CLK
Master reference clock
29
AGND
OE
Output enable (active high)
28
AVDD
27
GS2
D0–D15 Data output bits; D0 is LSB; D15 is MSB
OVR
Overrange indicator bit (active high)
26 N/C
N/C
No connect
25 OVR
GS[2:0]
24 D15 (MSB) AVDD
23 D14
RS
RDY
3-bit PGA gain setting control inputs
Analog +5.0 V supply
Resets internal state of chip (active low)
Initialization in progress indicator; RDY goes low
during reset initialization. Chip is ready for normal
operation when RDY is high.
BIASC External bias capacitor connection
BIASR External bias resistor connection
VRT, VRB ADC reference voltage outputs
VCM
Common mode reference voltage output
VIN+, VIN– Analog inputs to the PGA
ORDERING INFORMATION
PART NUMBER
SPT8100SIT
TEMPERATURE RANGE
–40 to +85 °C
PACKAGE
44L LQFP
SPT8100
10
1/9/02