SK70708 查看數據表（PDF） - Intel

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SK70708

1168 Kbps HSDL Data Pump Chip Set

Intel 

1168 Kbps HSDL Data Pump Chip Set — SK70704/SK70707 or SK70708

Contents

1.0

Pin Assignments and Signal Description ........................................................8

2.0

Functional Description...........................................................................................15

2.1 Transmit ..............................................................................................................15

2.2 Receive ...............................................................................................................15

2.3 Control.................................................................................................................15

2.4 ACC and HDX Overview .....................................................................................15

2.4.1 Analog Core Chip (ACC) ........................................................................15

2.4.2 HDSL Digital Transceiver (HDX) ............................................................16

2.4.3 HDX/ACC Interface ................................................................................17

2.5 Line Interface.......................................................................................................17

2.6 HDSL Data Interface ...........................................................................................18

2.7 Microprocessor Interface (HDX)..........................................................................21

2.7.1 Control Pins............................................................................................21

2.7.2 Register Access .....................................................................................22

2.7.3 Registers ................................................................................................23

2.8 Activation State Machines ...................................................................................29

2.8.1 LTU Data Pump Activation .....................................................................29

2.8.2 LTU Framer Activation ...........................................................................31

2.8.3 NTU Data Pump Activation ....................................................................33

2.8.4 NTU Framer Activation...........................................................................33

2.8.5 HDSL Synchronization State Machine ...................................................33

3.0

Application Information .........................................................................................37

3.1 HDSL Framer State Machine Design ..................................................................37

3.2 PCB Layout .........................................................................................................37

3.2.1 User Interface.........................................................................................37

3.2.2 Digital Section ........................................................................................38

3.2.3 Analog Section .......................................................................................38

4.0

Test Specifications ..................................................................................................44

5.0

Mechanical Specifications....................................................................................53

Datasheet

3

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