DS17485S-3 查看數據表（PDF） - Maxim Integrated
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DS17485S-3 Datasheet PDF : 31 Pages
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DS17285/DS17287/
DS17485/DS17487/
DS17885/DS17887
Register C (0Ch)
MSB
BIT 7
IRQF
BIT 6
PF
BIT 5
AF
BIT 4
UF
Bit 7: Interrupt Request Flag (IRQF). This bit is set to 1
when any of the following are true:
PF = PIE = 1
WF = WIE = 1
AF = AIE = 1
KF = KSE = 1
UF = UIE = 1
RF = RIE = 1
Any time the IRQF bit is 1, the IRQ pin is driven low. Flag
bits PF, AF, and UF are cleared after reading Register C.
Bit 6: Periodic Interrupt Flag (PF). This is a read-only bit
that is set to 1 when an edge is detected on the selected
tap of the divider chain. The RS3–RS0 bits establish the
periodic rate. PF is set to 1 independent of the state of the
PIE bit. When both PF and PIE are 1s, the IRQ signal is
Register D (0Dh)
MSB
BIT 7
VRT
BIT 6
0
BIT 5
0
BIT 4
0
Register D (0Dh)
Bit 7: Valid RAM and Time (VRT). This bit indicates
the condition of the battery connected to the VBAT and
VBAUX pin. If either supply is above the internal voltage
threshold, VRTTRIP, the bit will be high. This bit is not
writeable and should always be a 1 when read. If a 0 is
Real-Time Clocks
BIT 3
0
BIT 2
0
BIT 1
0
LSB
BIT 0
0
active and sets the IRQF bit. Reading Register C clears
this bit.
Bit 5: Alarm Interrupt Flag (AF). A 1 in this bit indicates
that the current time has matched the alarm time. If the
AIE bit is also 1, the IRQ pin goes low and a 1 appears in
the IRQF bit. Reading Register C clears this bit.
Bit 4: Update-Ended Interrupt Flag (UF). This bit is set
after each update cycle. When the UIE bit is set to 1, the
1 in UF causes the IRQF bit to be 1, which asserts IRQ.
Reading Register C clears this bit.
Bits 3 to 0: Unused. These unused bits always read 0
and cannot be written.
BIT 3
0
BIT 2
0
BIT 1
0
LSB
BIT 0
0
ever present, an exhausted internal lithium energy source
is indicated and both the contents of the RTC data and
RAM data are questionable.
Bits 6 to 0: Unused. These bits cannot be written and,
when read, always read 0.
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