DS17485-5 查看數據表（PDF） - Maxim Integrated

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DS17485-5

Real-Time Clocks

Maxim Integrated 

DS17285/DS17287/

DS17485/DS17487/

DS17885/DS17887

Extended Functions

The extended functions provided by the DS17x85/

DS17x87 that are new to the RAMified RTC family

are accessed by a software-controlled bank-switching

scheme, as illustrated in Table 5. In bank 0, the clock/

calendar registers and 50 bytes of user RAM are in the

same locations as for the DS1287. As a result, existing

routines implemented within BIOS, DOS, or application

software packages can gain access to the DS17x85/

DS17x87 clock registers with no changes. Also in bank

0, an extra 64 bytes of RAM are provided at addresses

just above the original locations for a total of 114 directly

addressable bytes of user RAM.

When bank 1 is selected, the clock/calendar registers and

the original 50 bytes of user RAM still appear as bank 0.

However, the extended registers that provide control and

status for the extended functions are accessed in place of

the additional 64 bytes of user RAM. The major extended

functions controlled by the extended registers are listed

below:

• 64-Bit Silicon Serial Number

• Century Counter

• RTC Write Counter

• Date Alarm

• Auxiliary Battery Control/Status

• Wake-Up

Real-Time Clocks

• Kickstart

• RAM Clear Control/Status

• Extended RAM Access

The bank selection is controlled by the state of the DV0 bit in

register A. To access bank 0 the DV0 bit should be written to

a 0. To access bank 1, DV0 should be written to 1. Register

locations designated as reserved in the bank 1 map are

reserved for future use by Dallas Semiconductor. Bits in

these locations cannot be written and return a 0 if read.

Silicon Serial Number

A unique 64-bit lasered serial number is located in bank 1,

registers 40h–47h. This serial number is divided into three

parts. The first byte in register 40h contains a model num-

ber to identify the device type of the DS17x85/DS17x87.

Registers 41h–46h contain a unique binary number.

Register 47h contains a CRC byte used to validate the

data in registers 40h–46h. The CRC polynomial is X8 +

X5 + X4 + 1. See Figure 5. All 8 bytes of the serial number

are read-only registers. The DS17x85/DS17x87 is manu-

factured such that no two devices contain an identical

number in locations 41h–47h.

DEVICE

DS17285/87

DS17485/87

DS17885/87

MODEL NUMBER

72h

74h

78h

POLYNOMIAL = X8 + X5 + X4 + 1

1ST

STAGE

X0

2ND

STAGE

X1

3RD

STAGE

X2

4TH

STAGE

X3

Figure 5. CRC Polynomial

5TH

STAGE

X4

6TH

STAGE

7TH

STAGE

8TH

STAGE

X5

X6

X7

X8

INPUT DATA

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