PEB2047 查看數據表（PDF） - Infineon Technologies

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PEB2047

Memory Time Switch Large

Infineon Technologies 

PEB 2047

PEB 2047-16

4 Detailed Register Description

4.1 Mode Register (MOD)

Access in the multiplexed µP-interface mode:

Access in a demultiplexed µP-interface mode:

Reset value:

00H

Read/write, address: 0H

Read/write, address: 0H

Bit 7

PSB

MD2

Bit 0

0

OMD1 OMD0 IMD2 IMD1 IMD0

PSB

MD2

OMD1 … OMD0

PCM Stand By; a logical 0 switches the PCM-interface outputs to high

impedance.

If set to “1”, the PEB 2047 is able to switch channels with 2048-kHz data rate,

when operating with 8.192 MHz (switching capacity 512 × 512 time-slots) or

4.096 MHz (switching capacity 512 × 256 time-slots).

Output Mode 1 and 0; these bits define the PCM-output mode according to

the following table.

Table 2

Output Modes

Device Clock

[kHz]

4.096

8.192

16.384

Output Mode

OMD (1:0)1)

0

1

3

0

1

3

0

1

3

Port Numbers

OUT (7:0)

OUT7, OUT5, OUT3, OUT1,

OUT2, OUT0

OUT (3:0)

OUT (7:0)

OUT7, OUT5, OUT3, OUT1,

OUT2, OUT0

OUT (3:0)

OUT (7:0)

OUT7, OUT5, OUT3, OUT1,

OUT2, OUT0

OUT (3:0)

Number of Ports ×

Data Rate/kbit/s

8 × 2048

4 × 2048 /

2 × 4096

4 × 4096

8 × 4096

4 × 4096 /

2 × 8192

4 × 8192

8 × 8192

4 × 8192 /

2 × 16384

4 × 16384

1) Input and output mode combinations which use the same device clock frequency have to be selected.

Semiconductor Group

21

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