ISL97673IRZ 查看數據表（PDF） - Renesas Electronics

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ISL97673IRZ

6-Channel SMBus or PWM Dimming LED Driver with Phase Shift Control

Renesas Electronics 

ISL97673

TABLE 3A. REGISTER LISTING

ADDRESS REGISTER

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

DEFAULT SMBus/I2C

BIT 0 VALUE PROTOCOL

0x00

PWM

Brightness

Control

Register

BRT7

BRT6

BRT5

BRT4

BRT3

BRT2

BRT1

BRT0

0xFF Read and Write

0x01

Device Control Reserved Reserved Reserved Reserved Reserved PWM_MD PWM_SEL BL_CTL

Register

0x00

Read and Write

0x02

Fault/Status

Register

Reserved Reserved 2_CH_SD 1_CH_SD BL_STAT OV_CURR THRM_SHDN FAULT

0x00

Read Only

0x03 Si Revision

1

1

0

0

1

REV2

REV1

REV0

0xC8

Read Only

Register

0x07

DC Brightness

Control

Register

BRTDC7

BRTDC6

BRTDC5 BRTDC4 BRTDC3 BRTDC2

BRTDC1 BRTDC0 0xFF Read and Write

0x08

Configuration Reserved DirectPWM PWMtoDC BstSlew BstSlew

Register

Rate1

Rate0

FSW

VSC1

VSC0

0x1F Read and Write

0x09

Output

Channel

Register

Reserved Reserved

CH5

CH4

CH3

CH2

CH1

CH0

0x3F Read and Write

0x0A

Phase Shift

Deg

Equal

Phase

Phase

Shift6

Phase

Shift5

Phase

Shift4

Phase

Shift3

Phase

Shift2

Phase

Shift1

Phase

Shift0

0x00 Read and Write

ADDRESS

REGISTER

0x00

PWM Brightness Control

Register

0x01 Device Control Register

0x02 Fault/Status Register

0x03

0x07

0x08

Si Revision Register

DC Brightness Control

Register

Configuration Register

0x09

0x0A

Output Channel Select and

Fault Readout Register

Phase Shift Degree

TABLE 3B. DATA BIT DESCRIPTIONS

DATA BIT DESCRIPTIONS

BRT[7..0] = 256 steps of DPWM duty cycle brightness control

PWM_MD = PWM mode select bit (1 = absolute brightness, 0 = % change),

default = 0

PWM_SEL = Brightness control select bit (1 = control by PWMI, 0 = control by

SMBus/I2C), default = 0

BL_CTL = BL On/Off (1 = On, 0 = Off), default = 0

2_CH_SD = Two LED output channels are shutdown (1 = shutdown, 0 = OK)

1_CH_SD = One LED output channel is shutdown (1 = shutdown, 0 = OK)

BL_STAT = BL status (1 = BL On, 0 = BL Off)

OV_CURR = Input overcurrent (1 = Overcurrent condition, 0 = Current OK)

THRM_SHDN = Thermal Shutdown (1 = Thermal fault, 0 = Thermal OK)

FAULT = Fault occurred (Logic “OR” of all of the fault conditions)

REV[2..0] = Silicon rev (Rev 0 through Rev 7 allowed for silicon spins)

BRTDC[7..0] = 256 steps of DC brightness control

DirectPWM = Forces the PWM input signal to directly control the current sources.

PWM-to-DC = Switches current sources on and varies DC level rather than PWMing.

BstSlewRate = Controls strength of FET driver. 00 - 25% drive strength, 01 - 50%

drive strength, 10 - 75% drive strength, 11 - 100% drive strength.

FSW = Switching frequencies selection, FSW = 0 = 1.2MHz. FSW = 1 = 600kHz

VSC[1..0] = Short circuit thresholds selection, 0 = disabled, 1 = 3.6V, 2 = 4.8V, 3

= 5.8V

CH[5..0] = Output Channel Read and Write. In Write, 1 = Channel Enabled, 0 =

Channel Disabled. In Read, 1 = Channel OK, 0 = Channel Shutdown or Disabled

EqualPhase = Controls phase shift mode - When 0, phase shift is defined by

PhaseShift<6:0>. When 1, phase shift is 360/N (where N is the number of channels

enabled).

PS[6..0] = 7-bit Phase shift setting - phase shift between each channel is

PhaseShift<6:0>/(255*PWMFreq). In direct PWM modes, phase shift between each

channel is PhaseShift<6:0>/12.8MHz. Note that user must not specify a value that

gives >360° shift between first and last channels.

FN7633 Rev.3.00

Sep 19, 2017

Page 19 of 28

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