NG80960JD-66 查看數據表（PDF） - Unspecified

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NG80960JD-66

3.3 V EMBEDDED 32-BIT MICROPROCESSOR

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80960JD

Table 18. Natural Boundaries for Load and Store Accesses

Data Width

Byte

Short Word

Word

Double Word

Triple Word

Quad Word

Natural Boundary (Bytes)

1

2

4

8

16

16

Table 19. Summary of Byte Load and Store Accesses

Address Offset from

Natural Boundary

(in Bytes)

+0 (aligned)

Accesses on 8-Bit Bus

(WIDTH1:0=00)

Accesses on 16 Bit

Bus (WIDTH1:0=01)

• byte access

• byte access

Accesses on 32 Bit

Bus (WIDTH1:0=10)

• byte access

Table 20. Summary of Short Word Load and Store Accesses

Address Offset from

Natural Boundary

(in Bytes)

+0 (aligned)

+1

Accesses on 8-Bit Bus

(WIDTH1:0=00)

Accesses on 16 Bit

Bus (WIDTH1:0=01)

• burst of 2 bytes

• 2 byte accesses

• short-word access

• 2 byte accesses

Accesses on 32 Bit

Bus (WIDTH1:0=10)

• short-word access

• 2 byte accesses

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