MCF5270CVM150 查看數據表（PDF） - Freescale Semiconductor

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MCF5270CVM150

Integrated Microprocessor Hardware Specification

Freescale Semiconductor 

Electrical Characteristics

2 This device contains circuitry protecting against damage due to high static voltage or

electrical fields; however, it is advised that normal precautions be taken to avoid application of

any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of

operation is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g.,

either VSS or OVDD).

3 Input must be current limited to the value specified. To determine the value of the required

current-limiting resistor, calculate resistance values for positive and negative clamp voltages,

then use the larger of the two values.

4 All functional non-supply pins are internally clamped to VSS and OVDD.

5 Power supply must maintain regulation within operating OVDD range during instantaneous

and operating maximum current conditions. If positive injection current (Vin > OVDD) is greater

than IDD, the injection current may flow out of OVDD and could result in external power supply

going out of regulation. Insure external OVDD load will shunt current greater than maximum

injection current. This will be the greatest risk when the processor is not consuming power

(ex; no clock).Power supply must maintain regulation within operating OVDD range during

instantaneous and operating maximum current conditions.

7.2 Thermal Characteristics

The below table lists thermal resistance values.

Table 8. Thermal Characteristics

Characteristic

Symbol

196

MAPBGA

160QFP

Unit

Junction to ambient, natural convection Four layer board (2s2p) θJMA

321,2

401,2 °C/W

Junction to ambient (@200 ft/min)

Four layer board (2s2p) θJMA

291,2

361,2 °C/W

Junction to board

θJB

203

253 °C/W

Junction to case

θJC

104

104 °C/W

Junction to top of package

Ψjt

21,5

21,5 °C/W

Maximum operating junction temperature

Tj

104

105

oC

1 θJMA and Ψjt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection.

Motorola recommends the use of θJmA and power dissipation specifications in the system design to prevent

device junction temperatures from exceeding the rated specification. System designers should be aware that

device junction temperatures can be significantly influenced by board layout and surrounding devices.

Conformance to the device junction temperature specification can be verified by physical measurement in the

customer’s system using the Ψjt parameter, the device power dissipation, and the method described in

EIA/JESD Standard 51-2.

2 Per JEDEC JESD51-6 with the board horizontal.

3 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8.

Board temperature is measured on the top surface of the board near the package.

4 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL

SPEC-883 Method 1012.1).

5 Thermal characterization parameter indicating the temperature difference between package top and the

junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal

characterization parameter is written in conformance with Psi-JT.

The average chip-junction temperature (TJ) in °C can be obtained from:

TJ = TA + (PD × ΘJMA) (1)

Where:

MCF5271 Integrated Microprocessor Hardware Specification, Rev. 4

18

Freescale Semiconductor

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