LC7871E 查看數據表（PDF） - SANYO -> Panasonic
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LC7871E Datasheet PDF : 19 Pages
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LC7871E, 7871NE
Continued from preceding page.
Pin No.
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Pin
2DB0
2DB1
2DB2
2DB3
TEST
CDGM
TRANS0
TRANS1
TRANS2
TRANS3
TRANS4
TRANS5
VSS2
VDD2
BIAS1
TRANS
ROUT
GOUT
BOUT
VSS3
VDD3
BIAS2
VIDEO
TEST1
TEST2
FSCIN
VSYNC
2FSC
YS
CSYNC
SON
EFLG
FSX
M1/M2
DEN
PALID
HRESET
FSC
VRESET
4FSC2
RESET
N/P1
N/P2
XIN2
XOUT2
XIN1
XOUT1
I/O
Function
I/O
I/O
I/O Secondary DRAM data
I/O
I IC testing
O Outputs a high level when reading a CD-G disk
O
O
O
Transparency digital output
O
O
O
— Analog system ground
— Analog system power supply
O Ripple rejection capacitor connection
O Define-transparency 6-bit D/A converter output
O Red data 6-bit D/A converter output
O Green data 6-bit D/A converter output
O Blue data 6-bit D/A converter output
— Analog system ground
— Analog system power supply
O Ripple rejection capacitor connection
O Composite video output (8-bit D/A converter output)
I
IC testing
I
I Subcarrier clock input (feedback resistor built in)
O Vertical synchronization signal output
O 2FSC output
O Superimposition control output
O Composite sync output
I Superimposition on/off
O Error state monitor
O Error state monitor trigger
I Selects one or two 256 kbit DRAMs: High: one DRAM, low: two DRAMs
I Disk information display enable: High: BGC, low: enable (pull-down resistor built in)
I PAL mode superimposition control (pull-up resistor built in)
I External horizontal timing control
O Subcarrier clock output NTSC mode: 3.579545 MHz, PAL mode: 4.433619 MHz
I External vertical timing control
I External superimposition mode clock input (feedback resistor built in)
I Reset input
I NTSC/PAL selection: High: NTSC, low: PAL (RGB encoder)
I NTSC/PAL selection: High: NTSC, low: PAL (CD-G decoder)
I
Crystal oscillator connection 17.734476 MHz (PAL)
O
I
Crystal oscillator connection 14.31818 MHz (NTSC)
O
No. 4861-10/19
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